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git01.mediatek.com / filogic / uboot / cbfd7ff6bbafde0b5b3e4fbd25a92a938eecb416 / . / arch / x86 / cpu / start16.S
blob: e718d4b26ff5fd79a9a08a0bfba38c426e373bb6 [file] [log] [blame]
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]1/*
Graeme Russcbfce1d2011-04-13 19:43:28 +1000[diff] [blame]2 * U-boot - x86 Startup Code
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]3 *
Graeme Russ45fc1d82011-04-13 19:43:26 +1000[diff] [blame]4 * (C) Copyright 2008-2011
5 * Graeme Russ, <graeme.russ@gmail.com>
6 *
7 * (C) Copyright 2002,2003
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +0200[diff] [blame]8 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]9 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]10 * SPDX-License-Identifier: GPL-2.0+
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]11 */
12
Graeme Russ80ccbac2010-10-07 20:03:30 +1100[diff] [blame]13#include <asm/global_data.h>
Graeme Russ93efcb22011-02-12 15:11:32 +1100[diff] [blame]14#include <asm/processor-flags.h>
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]15
16#define BOOT_SEG 0xffff0000 /* linear segment of boot code */
17#define a32 .byte 0x67;
18#define o32 .byte 0x66;
19
20.section .start16, "ax"
21.code16
22.globl start16
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]23start16:
Gabe Blackef899322012-11-03 11:41:28 +0000[diff] [blame]24 /* Set the Cold Boot / Hard Reset flag */
25 movl $GD_FLG_COLD_BOOT, %ebx
26
Simon Glasscbfd7ff2014-11-06 13:20:01 -0700[diff] [blame^]27 /* Turn off cache (this might require a 486-class CPU) */
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]28 movl %cr0, %eax
Ondrej Kupka19c114a2011-09-30 21:05:11 +1100[diff] [blame]29 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]30 movl %eax, %cr0
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]31 wbinvd
32
Graeme Russ59da5a52010-04-24 00:05:43 +1000[diff] [blame]33 /* load the temporary Global Descriptor Table */
Graeme Russ4fdcc422010-08-22 16:25:59 +1000[diff] [blame]34o32 cs lidt idt_ptr
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]35o32 cs lgdt gdt_ptr
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]36
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]37 /* Now, we enter protected mode */
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]38 movl %cr0, %eax
Graeme Russ93efcb22011-02-12 15:11:32 +1100[diff] [blame]39 orl $X86_CR0_PE, %eax
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]40 movl %eax, %cr0
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]41
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]42 /* Flush the prefetch queue */
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]43 jmp ff
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]44ff:
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]45 /* Finally jump to the 32bit initialization code */
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]46 movw $code32start, %ax
Graeme Russ3e6ec382010-10-07 20:03:21 +1100[diff] [blame]47 movw %ax, %bp
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]48o32 cs ljmp *(%bp)
49
50 /* 48-bit far pointer */
51code32start:
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]52 .long _start /* offset */
53 .word 0x10 /* segment */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]54
Graeme Russ4fdcc422010-08-22 16:25:59 +1000[diff] [blame]55idt_ptr:
56 .word 0 /* limit */
57 .long 0 /* base */
58
Graeme Russ59da5a52010-04-24 00:05:43 +1000[diff] [blame]59/*
60 * The following Global Descriptor Table is just enough to get us into
61 * 'Flat Protected Mode' - It will be discarded as soon as the final
62 * GDT is setup in a safe location in RAM
63 */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]64gdt_ptr:
Bin Meng0f39bc02014-10-16 22:58:35 +0800[diff] [blame]65 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]66 .long BOOT_SEG + gdt /* base */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]67
Graeme Russaf3f2c82011-12-19 14:26:18 +1100[diff] [blame]68/* Some CPUs are picky about GDT alignment... */
69.align 16
70gdt:
71 /*
72 * The GDT table ...
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]73 *
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]74 * Selector Type
75 * 0x00 NULL
76 * 0x08 Unused
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]77 * 0x10 32bit code
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]78 * 0x18 32bit data/stack
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]79 */
Graeme Russaf3f2c82011-12-19 14:26:18 +1100[diff] [blame]80 /* The NULL Desciptor - Mandatory */
81 .word 0x0000 /* limit_low */
82 .word 0x0000 /* base_low */
83 .byte 0x00 /* base_middle */
84 .byte 0x00 /* access */
85 .byte 0x00 /* flags + limit_high */
86 .byte 0x00 /* base_high */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]87
Graeme Russaf3f2c82011-12-19 14:26:18 +1100[diff] [blame]88 /* Unused Desciptor - (matches Linux) */
89 .word 0x0000 /* limit_low */
90 .word 0x0000 /* base_low */
91 .byte 0x00 /* base_middle */
92 .byte 0x00 /* access */
93 .byte 0x00 /* flags + limit_high */
94 .byte 0x00 /* base_high */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]95
Graeme Russaf3f2c82011-12-19 14:26:18 +1100[diff] [blame]96 /*
97 * The Code Segment Descriptor:
98 * - Base = 0x00000000
99 * - Size = 4GB
100 * - Access = Present, Ring 0, Exec (Code), Readable
101 * - Flags = 4kB Granularity, 32-bit
102 */
103 .word 0xffff /* limit_low */
104 .word 0x0000 /* base_low */
105 .byte 0x00 /* base_middle */
106 .byte 0x9b /* access */
107 .byte 0xcf /* flags + limit_high */
108 .byte 0x00 /* base_high */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]109
Graeme Russaf3f2c82011-12-19 14:26:18 +1100[diff] [blame]110 /*
111 * The Data Segment Descriptor:
112 * - Base = 0x00000000
113 * - Size = 4GB
114 * - Access = Present, Ring 0, Non-Exec (Data), Writable
115 * - Flags = 4kB Granularity, 32-bit
116 */
117 .word 0xffff /* limit_low */
118 .word 0x0000 /* base_low */
119 .byte 0x00 /* base_middle */
120 .byte 0x93 /* access */
121 .byte 0xcf /* flags + limit_high */
122 .byte 0x00 /* base_high */