blob: 3e0b4250788816ab2ef48243fb19d4195bb46ea5 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Hannes Petermaierfb003662014-02-07 08:07:36 +01002/*
3 * bur_am335x_common.h
4 *
5 * common parts used by B&R AM335x based boards
6 *
Hannes Schmelzer27bf4412016-02-19 12:09:45 +01007 * Copyright (C) 2016 Hannes Schmelzer <oe5hpm@oevsv.at> -
Hannes Petermaierfb003662014-02-07 08:07:36 +01008 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
Hannes Petermaierfb003662014-02-07 08:07:36 +01009 */
10
11#ifndef __BUR_AM335X_COMMON_H__
12#define __BUR_AM335X_COMMON_H__
13/* ------------------------------------------------------------------------- */
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +020014
15/* legacy #defines for non DM bur-board */
16#ifndef CONFIG_DM
Tom Rinidf6a2152022-11-16 13:10:28 -050017#define CFG_SYS_NS16550_CLK (48000000)
18#define CFG_SYS_NS16550_COM1 0x44e09000
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +020019
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +020020#endif /* CONFIG_DM */
21
Hannes Petermaierfb003662014-02-07 08:07:36 +010022#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
23
24/* Timer information */
Tom Rini6a5dccc2022-11-16 13:10:41 -050025#define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
Hannes Petermaierfb003662014-02-07 08:07:36 +010026
Hannes Petermaierfb003662014-02-07 08:07:36 +010027#include <asm/arch/omap.h>
28
Hannes Petermaierfb003662014-02-07 08:07:36 +010029/*
30 * SPL related defines. The Public RAM memory map the ROM defines the
31 * area between 0x402F0400 and 0x4030B800 as a download area and
32 * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also
33 * supports X-MODEM loading via UART, and we leverage this and then use
Tom Rinicfff4aa2016-08-26 13:30:43 -040034 * Y-MODEM to load u-boot.img, when booted over UART. We must also include
35 * the scratch space that U-Boot uses in SRAM.
Hannes Petermaierfb003662014-02-07 08:07:36 +010036 */
Hannes Petermaierfb003662014-02-07 08:07:36 +010037
38/*
39 * Since SPL did pll and ddr initialization for us,
40 * we don't need to do it twice.
41 */
Hannes Petermaierfb003662014-02-07 08:07:36 +010042/*
Hannes Petermaierfb003662014-02-07 08:07:36 +010043 * ----------------------------------------------------------------------------
44 * DDR information. We say (for simplicity) that we have 1 bank,
45 * always, even when we have more. We always start at 0x80000000,
46 * and we place the initial stack pointer in our SRAM.
47 */
Tom Rinibb4dd962022-11-16 13:10:37 -050048#define CFG_SYS_SDRAM_BASE 0x80000000
Hannes Petermaierfb003662014-02-07 08:07:36 +010049
Hannes Petermaierfb003662014-02-07 08:07:36 +010050/*
51 * Our platforms make use of SPL to initalize the hardware (primarily
52 * memory) enough for full U-Boot to be loaded. We also support Falcon
53 * Mode so that the Linux kernel can be booted directly from SPL
54 * instead, if desired. We make use of the general SPL framework found
55 * under common/spl/. Given our generally common memory map, we set a
56 * number of related defaults and sizes here.
57 */
Hannes Petermaierfb003662014-02-07 08:07:36 +010058/*
59 * Place the image at the start of the ROM defined image space.
60 * We limit our size to the ROM-defined downloaded image area, and use the
61 * rest of the space for stack. We load U-Boot itself into memory at
62 * 0x80800000 for legacy reasons (to not conflict with older SPLs). We
63 * have our BSS be placed 1MiB after this, to allow for the default
64 * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
65 * We have the SPL malloc pool at the end of the BSS area.
66 *
67 * ----------------------------------------------------------------------------
68 */
Hannes Petermaierfb003662014-02-07 08:07:36 +010069
70/* General parts of the framework, required. */
Hannes Petermaierfb003662014-02-07 08:07:36 +010071
72#endif /* ! __BUR_AM335X_COMMON_H__ */