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Tim Harvey0cee2242015-05-08 18:28:35 -07001/*
2 * Copyright (C) 2013 Gateworks Corporation
3 *
4 * Author: Tim Harvey <tharvey@gateworks.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef _GWVENTANA_COMMON_H_
10#define _GWVENTANA_COMMON_H_
11
12#include "ventana_eeprom.h"
13
14/* GPIO's common to all baseboards */
15#define GP_PHY_RST IMX_GPIO_NR(1, 30)
16#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22)
17#define GP_SD3_CD IMX_GPIO_NR(7, 0)
18#define GP_RS232_EN IMX_GPIO_NR(2, 11)
19#define GP_MSATA_SEL IMX_GPIO_NR(2, 8)
20
21#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
22 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
23 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
24
25#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
26 PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
27 PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
28
29#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
30 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
31 PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
32
33#define SPI_PAD_CTRL (PAD_CTL_HYS | \
34 PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
35 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
36
Tim Harvey0cee2242015-05-08 18:28:35 -070037#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
38 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
39 PAD_CTL_ODE | PAD_CTL_SRE_FAST)
40
41#define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
42 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
43 PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
44
Tim Harveydb7edfa2015-05-26 11:04:54 -070045#define DIO_PAD_CFG (MUX_PAD_CTRL(IRQ_PAD_CTRL) | MUX_MODE_SION)
Tim Harvey0cee2242015-05-08 18:28:35 -070046
47#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
48
49/*
50 * each baseboard has 4 user configurable Digital IO lines which can
51 * be pinmuxed as a GPIO or in some cases a PWM
52 */
53struct dio_cfg {
54 iomux_v3_cfg_t gpio_padmux[2];
55 unsigned gpio_param;
56 iomux_v3_cfg_t pwm_padmux[2];
57 unsigned pwm_param;
58};
59
60struct ventana {
61 /* pinmux */
62 iomux_v3_cfg_t const *gpio_pads;
63 int num_pads;
64 /* DIO pinmux/val */
65 struct dio_cfg dio_cfg[4];
66 int num_gpios;
67 /* various gpios (0 if non-existent) */
68 int leds[3];
69 int pcie_rst;
70 int mezz_pwren;
71 int mezz_irq;
72 int rs485en;
73 int gps_shdn;
74 int vidin_en;
75 int dioi2c_en;
76 int pcie_sson;
77 int usb_sel;
78 int wdis;
79};
80
81extern struct ventana gpio_cfg[GW_UNKNOWN];
82
83/* configure i2c iomux */
84void setup_ventana_i2c(void);
85/* configure uart iomux */
86void setup_iomux_uart(void);
87/* conifgure PMIC */
Tim Harvey195bc972015-05-08 18:28:37 -070088void setup_pmic(void);
Tim Harvey0cee2242015-05-08 18:28:35 -070089/* configure gpio iomux/defaults */
90void setup_iomux_gpio(int board, struct ventana_board_info *);
91/* late setup of GPIO (configuration per baseboard and env) */
92void setup_board_gpio(int board, struct ventana_board_info *);
93
94#endif /* #ifndef _GWVENTANA_COMMON_H_ */