| Tim Harvey | 0cee224 | 2015-05-08 18:28:35 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2013 Gateworks Corporation |
| 3 | * |
| 4 | * Author: Tim Harvey <tharvey@gateworks.com> |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | #ifndef _GWVENTANA_COMMON_H_ |
| 10 | #define _GWVENTANA_COMMON_H_ |
| 11 | |
| 12 | #include "ventana_eeprom.h" |
| 13 | |
| 14 | /* GPIO's common to all baseboards */ |
| 15 | #define GP_PHY_RST IMX_GPIO_NR(1, 30) |
| 16 | #define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) |
| 17 | #define GP_SD3_CD IMX_GPIO_NR(7, 0) |
| 18 | #define GP_RS232_EN IMX_GPIO_NR(2, 11) |
| 19 | #define GP_MSATA_SEL IMX_GPIO_NR(2, 8) |
| 20 | |
| 21 | #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 22 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
| 23 | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| 24 | |
| 25 | #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 26 | PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ |
| 27 | PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| 28 | |
| 29 | #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 30 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
| 31 | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) |
| 32 | |
| 33 | #define SPI_PAD_CTRL (PAD_CTL_HYS | \ |
| 34 | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ |
| 35 | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) |
| 36 | |
| 37 | #define DIO_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 38 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
| 39 | PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST) |
| 40 | |
| 41 | #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ |
| 42 | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ |
| 43 | PAD_CTL_ODE | PAD_CTL_SRE_FAST) |
| 44 | |
| 45 | #define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 46 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
| 47 | PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST) |
| 48 | |
| 49 | #define DIO_PAD_CFG (MUX_PAD_CTRL(DIO_PAD_CTRL) | MUX_MODE_SION) |
| 50 | |
| 51 | #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) |
| 52 | |
| 53 | /* |
| 54 | * each baseboard has 4 user configurable Digital IO lines which can |
| 55 | * be pinmuxed as a GPIO or in some cases a PWM |
| 56 | */ |
| 57 | struct dio_cfg { |
| 58 | iomux_v3_cfg_t gpio_padmux[2]; |
| 59 | unsigned gpio_param; |
| 60 | iomux_v3_cfg_t pwm_padmux[2]; |
| 61 | unsigned pwm_param; |
| 62 | }; |
| 63 | |
| 64 | struct ventana { |
| 65 | /* pinmux */ |
| 66 | iomux_v3_cfg_t const *gpio_pads; |
| 67 | int num_pads; |
| 68 | /* DIO pinmux/val */ |
| 69 | struct dio_cfg dio_cfg[4]; |
| 70 | int num_gpios; |
| 71 | /* various gpios (0 if non-existent) */ |
| 72 | int leds[3]; |
| 73 | int pcie_rst; |
| 74 | int mezz_pwren; |
| 75 | int mezz_irq; |
| 76 | int rs485en; |
| 77 | int gps_shdn; |
| 78 | int vidin_en; |
| 79 | int dioi2c_en; |
| 80 | int pcie_sson; |
| 81 | int usb_sel; |
| 82 | int wdis; |
| 83 | }; |
| 84 | |
| 85 | extern struct ventana gpio_cfg[GW_UNKNOWN]; |
| 86 | |
| 87 | /* configure i2c iomux */ |
| 88 | void setup_ventana_i2c(void); |
| 89 | /* configure uart iomux */ |
| 90 | void setup_iomux_uart(void); |
| 91 | /* conifgure PMIC */ |
| 92 | void setup_pmic(int board); |
| 93 | /* configure gpio iomux/defaults */ |
| 94 | void setup_iomux_gpio(int board, struct ventana_board_info *); |
| 95 | /* late setup of GPIO (configuration per baseboard and env) */ |
| 96 | void setup_board_gpio(int board, struct ventana_board_info *); |
| 97 | |
| 98 | #endif /* #ifndef _GWVENTANA_COMMON_H_ */ |