blob: 67cec6563a2c0c927bac228dec82aa50cad8cf81 [file] [log] [blame]
Simon Goldschmidtbe366392019-07-15 21:47:53 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2019 Pepperl+Fuchs
4 * Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
5 */
6
7#include <common.h>
8#include <dm.h>
9#include <errno.h>
10#include <sysreset.h>
11#include <asm/io.h>
12#include <asm/arch/reset_manager.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060013#include <linux/bitops.h>
Simon Goldschmidtbe366392019-07-15 21:47:53 +020014
15struct socfpga_sysreset_data {
Ley Foon Tanfed4c952019-11-08 10:38:19 +080016 void __iomem *rstmgr_base;
Simon Goldschmidtbe366392019-07-15 21:47:53 +020017};
18
19static int socfpga_sysreset_request(struct udevice *dev,
20 enum sysreset_t type)
21{
22 struct socfpga_sysreset_data *data = dev_get_priv(dev);
23
24 switch (type) {
25 case SYSRESET_WARM:
26 writel(BIT(RSTMGR_CTRL_SWWARMRSTREQ_LSB),
Ley Foon Tanfed4c952019-11-08 10:38:19 +080027 data->rstmgr_base + RSTMGR_CTRL);
Simon Goldschmidtbe366392019-07-15 21:47:53 +020028 break;
29 case SYSRESET_COLD:
30 writel(BIT(RSTMGR_CTRL_SWCOLDRSTREQ_LSB),
Ley Foon Tanfed4c952019-11-08 10:38:19 +080031 data->rstmgr_base + RSTMGR_CTRL);
Simon Goldschmidtbe366392019-07-15 21:47:53 +020032 break;
33 default:
34 return -EPROTONOSUPPORT;
35 }
36 return -EINPROGRESS;
37}
38
39static int socfpga_sysreset_probe(struct udevice *dev)
40{
41 struct socfpga_sysreset_data *data = dev_get_priv(dev);
42
Masahiro Yamada32822d02020-08-04 14:14:43 +090043 data->rstmgr_base = dev_read_addr_ptr(dev);
Simon Goldschmidtbe366392019-07-15 21:47:53 +020044 return 0;
45}
46
47static struct sysreset_ops socfpga_sysreset = {
48 .request = socfpga_sysreset_request,
49};
50
51U_BOOT_DRIVER(sysreset_socfpga) = {
52 .id = UCLASS_SYSRESET,
53 .name = "socfpga_sysreset",
54 .priv_auto_alloc_size = sizeof(struct socfpga_sysreset_data),
55 .ops = &socfpga_sysreset,
56 .probe = socfpga_sysreset_probe,
57};