Simon Goldschmidt | be36639 | 2019-07-15 21:47:53 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2019 Pepperl+Fuchs |
| 4 | * Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <dm.h> |
| 9 | #include <errno.h> |
| 10 | #include <sysreset.h> |
| 11 | #include <asm/io.h> |
| 12 | #include <asm/arch/reset_manager.h> |
| 13 | |
| 14 | struct socfpga_sysreset_data { |
| 15 | struct socfpga_reset_manager *rstmgr_base; |
| 16 | }; |
| 17 | |
| 18 | static int socfpga_sysreset_request(struct udevice *dev, |
| 19 | enum sysreset_t type) |
| 20 | { |
| 21 | struct socfpga_sysreset_data *data = dev_get_priv(dev); |
| 22 | |
| 23 | switch (type) { |
| 24 | case SYSRESET_WARM: |
| 25 | writel(BIT(RSTMGR_CTRL_SWWARMRSTREQ_LSB), |
| 26 | &data->rstmgr_base->ctrl); |
| 27 | break; |
| 28 | case SYSRESET_COLD: |
| 29 | writel(BIT(RSTMGR_CTRL_SWCOLDRSTREQ_LSB), |
| 30 | &data->rstmgr_base->ctrl); |
| 31 | break; |
| 32 | default: |
| 33 | return -EPROTONOSUPPORT; |
| 34 | } |
| 35 | return -EINPROGRESS; |
| 36 | } |
| 37 | |
| 38 | static int socfpga_sysreset_probe(struct udevice *dev) |
| 39 | { |
| 40 | struct socfpga_sysreset_data *data = dev_get_priv(dev); |
| 41 | |
| 42 | data->rstmgr_base = devfdt_get_addr_ptr(dev); |
| 43 | return 0; |
| 44 | } |
| 45 | |
| 46 | static struct sysreset_ops socfpga_sysreset = { |
| 47 | .request = socfpga_sysreset_request, |
| 48 | }; |
| 49 | |
| 50 | U_BOOT_DRIVER(sysreset_socfpga) = { |
| 51 | .id = UCLASS_SYSRESET, |
| 52 | .name = "socfpga_sysreset", |
| 53 | .priv_auto_alloc_size = sizeof(struct socfpga_sysreset_data), |
| 54 | .ops = &socfpga_sysreset, |
| 55 | .probe = socfpga_sysreset_probe, |
| 56 | }; |