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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Mingkai Hud2396512016-09-07 18:47:28 +08002/*
3 * Copyright 2016 Freescale Semiconductor
Yangbo Lubb32e682021-06-03 10:51:19 +08004 * Copyright 2019-2021 NXP
Mingkai Hud2396512016-09-07 18:47:28 +08005 */
6
7#ifndef __LS1046A_COMMON_H
8#define __LS1046A_COMMON_H
9
Sumit Gargc064fc72017-03-30 09:53:13 +053010/* SPL build */
11#ifdef CONFIG_SPL_BUILD
12#define SPL_NO_QBMAN
13#define SPL_NO_FMAN
14#define SPL_NO_ENV
15#define SPL_NO_MISC
16#define SPL_NO_QSPI
17#define SPL_NO_USB
18#define SPL_NO_SATA
19#endif
York Sun3e512d82018-06-26 14:48:29 -070020#if defined(CONFIG_SPL_BUILD) && \
21 (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
Sumit Gargc064fc72017-03-30 09:53:13 +053022#define SPL_NO_MMC
23#endif
York Sunc5c8e1e2018-06-08 16:37:27 -070024#if defined(CONFIG_SPL_BUILD) && \
York Sunc5c8e1e2018-06-08 16:37:27 -070025 !defined(CONFIG_SPL_FSL_LS_PPA)
Sumit Gargc064fc72017-03-30 09:53:13 +053026#define SPL_NO_IFC
27#endif
28
Mingkai Hud2396512016-09-07 18:47:28 +080029#define CONFIG_REMAKE_ELF
Mingkai Hud2396512016-09-07 18:47:28 +080030
31#include <asm/arch/config.h>
Bharat Bhushanc882dd72017-03-22 12:06:28 +053032#include <asm/arch/stream_id_lsch2.h>
Mingkai Hud2396512016-09-07 18:47:28 +080033
34/* Link Definitions */
Rajesh Bhagatcb6153b2018-11-05 18:02:36 +000035#ifdef CONFIG_TFABOOT
36#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
37#else
Mingkai Hud2396512016-09-07 18:47:28 +080038#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
Rajesh Bhagatcb6153b2018-11-05 18:02:36 +000039#endif
Mingkai Hud2396512016-09-07 18:47:28 +080040
Mingkai Hud2396512016-09-07 18:47:28 +080041#define CONFIG_VERY_BIG_RAM
42#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
43#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
44#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
45#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
46
Michael Wallef056e0f2020-06-01 21:53:26 +020047#define CPU_RELEASE_ADDR secondary_boot_addr
Mingkai Hud2396512016-09-07 18:47:28 +080048
49/* Generic Timer Definitions */
50#define COUNTER_FREQUENCY 25000000 /* 25MHz */
51
Mingkai Hud2396512016-09-07 18:47:28 +080052/* Serial Port */
Mingkai Hud2396512016-09-07 18:47:28 +080053#define CONFIG_SYS_NS16550_SERIAL
54#define CONFIG_SYS_NS16550_REG_SIZE 1
Hou Zhiqiang3f91cda2017-01-10 16:44:15 +080055#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
Mingkai Hud2396512016-09-07 18:47:28 +080056
Mingkai Hud2396512016-09-07 18:47:28 +080057#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
58
59/* SD boot SPL */
60#ifdef CONFIG_SD_BOOT
Mingkai Hud2396512016-09-07 18:47:28 +080061#define CONFIG_SPL_MAX_SIZE 0x1f000 /* 124 KiB */
62#define CONFIG_SPL_STACK 0x10020000
63#define CONFIG_SPL_PAD_TO 0x21000 /* 132 KiB */
64#define CONFIG_SPL_BSS_START_ADDR 0x8f000000
65#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
66#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
67 CONFIG_SPL_BSS_MAX_SIZE)
68#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
Ruchika Gupta0009c8f2017-04-17 18:07:19 +053069
Udit Agarwal22ec2382019-11-07 16:11:32 +000070#ifdef CONFIG_NXP_ESBC
Ruchika Gupta0009c8f2017-04-17 18:07:19 +053071#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
72/*
73 * HDR would be appended at end of image and copied to DDR along
74 * with U-Boot image. Here u-boot max. size is 512K. So if binary
75 * size increases then increase this size in case of secure boot as
76 * it uses raw u-boot image instead of fit image.
77 */
78#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
79#else
80#define CONFIG_SYS_MONITOR_LEN 0x100000
Udit Agarwal22ec2382019-11-07 16:11:32 +000081#endif /* ifdef CONFIG_NXP_ESBC */
Mingkai Hud2396512016-09-07 18:47:28 +080082#endif
83
York Sun3e512d82018-06-26 14:48:29 -070084#if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
85#define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl"
York Sun3e512d82018-06-26 14:48:29 -070086#define CONFIG_SPL_MAX_SIZE 0x1f000
87#define CONFIG_SPL_STACK 0x10020000
88#define CONFIG_SPL_PAD_TO 0x20000
89#define CONFIG_SPL_BSS_START_ADDR 0x8f000000
90#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
91#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
92 CONFIG_SPL_BSS_MAX_SIZE)
93#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
94#define CONFIG_SYS_MONITOR_LEN 0x100000
York Sun3e512d82018-06-26 14:48:29 -070095#endif
96
Shaohui Xie085ac1c2016-09-07 17:56:14 +080097/* NAND SPL */
98#ifdef CONFIG_NAND_BOOT
99#define CONFIG_SPL_PBL_PAD
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800100#define CONFIG_SPL_LIBCOMMON_SUPPORT
101#define CONFIG_SPL_LIBGENERIC_SUPPORT
102#define CONFIG_SPL_ENV_SUPPORT
Simon Glass1ba1d4e2021-07-10 21:14:28 -0600103#define CONFIG_SPL_WATCHDOG
Simon Glassbccfc2e2021-07-10 21:14:36 -0600104#define CONFIG_SPL_I2C
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800105
106#define CONFIG_SPL_NAND_SUPPORT
Simon Glass284cb9c2021-07-10 21:14:31 -0600107#define CONFIG_SPL_DRIVERS_MISC
Ruchika Gupta0009c8f2017-04-17 18:07:19 +0530108#define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800109#define CONFIG_SPL_STACK 0x1001f000
110#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
111#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
112
113#define CONFIG_SPL_BSS_START_ADDR 0x8f000000
114#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
115#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
116 CONFIG_SPL_BSS_MAX_SIZE)
117#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
118#define CONFIG_SYS_MONITOR_LEN 0xa0000
119#endif
120
Biwen Li479b9bd2021-02-05 19:02:01 +0800121/* GPIO */
122#ifdef CONFIG_DM_GPIO
123#ifndef CONFIG_MPC8XXX_GPIO
124#define CONFIG_MPC8XXX_GPIO
125#endif
126#endif
127
Mingkai Hud2396512016-09-07 18:47:28 +0800128/* I2C */
Mingkai Hud2396512016-09-07 18:47:28 +0800129
Hou Zhiqiang105457e2017-04-14 16:49:01 +0800130/* PCIe */
131#define CONFIG_PCIE1 /* PCIE controller 1 */
132#define CONFIG_PCIE2 /* PCIE controller 2 */
133#define CONFIG_PCIE3 /* PCIE controller 3 */
134
135#ifdef CONFIG_PCI
136#define CONFIG_PCI_SCAN_SHOW
Hou Zhiqiang105457e2017-04-14 16:49:01 +0800137#endif
138
Yuantian Tangd24716d2018-01-03 15:53:09 +0800139/* SATA */
140#ifndef SPL_NO_SATA
141#define CONFIG_SCSI_AHCI_PLAT
142
143#define CONFIG_SYS_SATA AHCI_BASE_ADDR
144
145#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
146#define CONFIG_SYS_SCSI_MAX_LUN 1
147#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
148 CONFIG_SYS_SCSI_MAX_LUN)
149#endif
150
Mingkai Hud2396512016-09-07 18:47:28 +0800151/* FMan ucode */
Sumit Gargc064fc72017-03-30 09:53:13 +0530152#ifndef SPL_NO_FMAN
Mingkai Hud2396512016-09-07 18:47:28 +0800153#define CONFIG_SYS_DPAA_FMAN
154#ifdef CONFIG_SYS_DPAA_FMAN
155#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
Sumit Gargc064fc72017-03-30 09:53:13 +0530156#endif
Mingkai Hud2396512016-09-07 18:47:28 +0800157
Rajesh Bhagatcb6153b2018-11-05 18:02:36 +0000158#ifdef CONFIG_TFABOOT
159#define CONFIG_SYS_FMAN_FW_ADDR 0x900000
Rajesh Bhagatcb6153b2018-11-05 18:02:36 +0000160#else
Mingkai Hud2396512016-09-07 18:47:28 +0800161#ifdef CONFIG_SD_BOOT
162/*
163 * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
164 * about 1MB (2048 blocks), Env is stored after the image, and the env size is
Alison Wang42f37802017-05-16 10:45:59 +0800165 * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800).
Mingkai Hud2396512016-09-07 18:47:28 +0800166 */
Alison Wang42f37802017-05-16 10:45:59 +0800167#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800)
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800168#elif defined(CONFIG_QSPI_BOOT)
Alison Wang42f37802017-05-16 10:45:59 +0800169#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800170#elif defined(CONFIG_NAND_BOOT)
Gong Qianyub91b5cf2017-09-18 16:59:28 +0800171#define CONFIG_SYS_FMAN_FW_ADDR (36 * CONFIG_SYS_NAND_BLOCK_SIZE)
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800172#else
Alison Wang42f37802017-05-16 10:45:59 +0800173#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000
Mingkai Hud2396512016-09-07 18:47:28 +0800174#endif
Rajesh Bhagatcb6153b2018-11-05 18:02:36 +0000175#endif
Mingkai Hud2396512016-09-07 18:47:28 +0800176#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
177#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
178#endif
179
180/* Miscellaneous configurable options */
Mingkai Hud2396512016-09-07 18:47:28 +0800181
182#define CONFIG_HWCONFIG
183#define HWCONFIG_BUFFER_SIZE 128
184
Qianyu Gong6264ab62017-06-15 11:10:09 +0800185#ifndef CONFIG_SPL_BUILD
186#define BOOT_TARGET_DEVICES(func) \
Yuantian Tangd24716d2018-01-03 15:53:09 +0800187 func(SCSI, scsi, 0) \
Qianyu Gong6264ab62017-06-15 11:10:09 +0800188 func(MMC, mmc, 0) \
Mian Yousaf Kaukabe1721582019-01-29 16:38:37 +0100189 func(USB, usb, 0) \
190 func(DHCP, dhcp, na)
Qianyu Gong6264ab62017-06-15 11:10:09 +0800191#include <config_distro_bootcmd.h>
192#endif
193
Vabhav Sharma51641912019-06-06 12:35:28 +0000194#if defined(CONFIG_TARGET_LS1046AFRWY)
195#define LS1046A_BOOT_SRC_AND_HDR\
196 "boot_scripts=ls1046afrwy_boot.scr\0" \
197 "boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
Biwen Li88dd2e82020-04-20 18:29:06 +0800198#elif defined(CONFIG_TARGET_LS1046AQDS)
199#define LS1046A_BOOT_SRC_AND_HDR\
200 "boot_scripts=ls1046aqds_boot.scr\0" \
201 "boot_script_hdr=hdr_ls1046aqds_bs.out\0"
Vabhav Sharma51641912019-06-06 12:35:28 +0000202#else
203#define LS1046A_BOOT_SRC_AND_HDR\
204 "boot_scripts=ls1046ardb_boot.scr\0" \
205 "boot_script_hdr=hdr_ls1046ardb_bs.out\0"
206#endif
Sumit Gargc064fc72017-03-30 09:53:13 +0530207#ifndef SPL_NO_MISC
Mingkai Hud2396512016-09-07 18:47:28 +0800208/* Initial environment variables */
209#define CONFIG_EXTRA_ENV_SETTINGS \
210 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
Mingkai Hud2396512016-09-07 18:47:28 +0800211 "ramdisk_addr=0x800000\0" \
212 "ramdisk_size=0x2000000\0" \
Yuantian Tange1786d32020-02-19 17:02:22 +0800213 "bootm_size=0x10000000\0" \
Qianyu Gong6264ab62017-06-15 11:10:09 +0800214 "fdt_addr=0x64f00000\0" \
Biwen Li88dd2e82020-04-20 18:29:06 +0800215 "kernel_addr=0x61000000\0" \
Qianyu Gong6264ab62017-06-15 11:10:09 +0800216 "scriptaddr=0x80000000\0" \
Sumit Garg860a3bd2017-06-06 20:50:29 +0530217 "scripthdraddr=0x80080000\0" \
Qianyu Gong6264ab62017-06-15 11:10:09 +0800218 "fdtheader_addr_r=0x80100000\0" \
219 "kernelheader_addr_r=0x80200000\0" \
220 "load_addr=0xa0000000\0" \
Sumit Garg860a3bd2017-06-06 20:50:29 +0530221 "kernel_addr_r=0x81000000\0" \
Qianyu Gong6264ab62017-06-15 11:10:09 +0800222 "fdt_addr_r=0x90000000\0" \
223 "ramdisk_addr_r=0xa0000000\0" \
Mingkai Hud2396512016-09-07 18:47:28 +0800224 "kernel_start=0x1000000\0" \
Priyanka Singha83b8db2020-01-22 10:29:46 +0000225 "kernelheader_start=0x600000\0" \
Mingkai Hud2396512016-09-07 18:47:28 +0800226 "kernel_load=0xa0000000\0" \
227 "kernel_size=0x2800000\0" \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530228 "kernelheader_size=0x40000\0" \
Shengzhou Liu47e7e032017-11-09 17:57:56 +0800229 "kernel_addr_sd=0x8000\0" \
230 "kernel_size_sd=0x14000\0" \
Priyanka Singha83b8db2020-01-22 10:29:46 +0000231 "kernelhdr_addr_sd=0x3000\0" \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530232 "kernelhdr_size_sd=0x10\0" \
Mingkai Hud2396512016-09-07 18:47:28 +0800233 "console=ttyS0,115200\0" \
Tom Rini5ad8e112017-10-22 17:55:07 -0400234 CONFIG_MTDPARTS_DEFAULT "\0" \
Qianyu Gong6264ab62017-06-15 11:10:09 +0800235 BOOTENV \
Vabhav Sharma51641912019-06-06 12:35:28 +0000236 LS1046A_BOOT_SRC_AND_HDR \
Qianyu Gong6264ab62017-06-15 11:10:09 +0800237 "scan_dev_for_boot_part=" \
238 "part list ${devtype} ${devnum} devplist; " \
239 "env exists devplist || setenv devplist 1; " \
240 "for distro_bootpart in ${devplist}; do " \
241 "if fstype ${devtype} " \
242 "${devnum}:${distro_bootpart} " \
243 "bootfstype; then " \
244 "run scan_dev_for_boot; " \
245 "fi; " \
246 "done\0" \
Sumit Garg860a3bd2017-06-06 20:50:29 +0530247 "boot_a_script=" \
248 "load ${devtype} ${devnum}:${distro_bootpart} " \
249 "${scriptaddr} ${prefix}${script}; " \
250 "env exists secureboot && load ${devtype} " \
251 "${devnum}:${distro_bootpart} " \
Vinitha V Pillai25355ec2019-04-23 05:52:17 +0000252 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
253 "env exists secureboot " \
254 "&& esbc_validate ${scripthdraddr};" \
Sumit Garg860a3bd2017-06-06 20:50:29 +0530255 "source ${scriptaddr}\0" \
Qianyu Gong6264ab62017-06-15 11:10:09 +0800256 "qspi_bootcmd=echo Trying load from qspi..;" \
257 "sf probe && sf read $load_addr " \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530258 "$kernel_start $kernel_size; env exists secureboot " \
259 "&& sf read $kernelheader_addr_r $kernelheader_start " \
260 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
261 "bootm $load_addr#$board\0" \
Biwen Li88dd2e82020-04-20 18:29:06 +0800262 "nand_bootcmd=echo Trying load from nand..;" \
263 "nand info; nand read $load_addr " \
264 "$kernel_start $kernel_size; env exists secureboot " \
265 "&& nand read $kernelheader_addr_r $kernelheader_start " \
266 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
267 "bootm $load_addr#$board\0" \
268 "nor_bootcmd=echo Trying load from nor..;" \
269 "cp.b $kernel_addr $load_addr " \
270 "$kernel_size; env exists secureboot " \
271 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
272 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
273 "bootm $load_addr#$board\0" \
Shengzhou Liu47e7e032017-11-09 17:57:56 +0800274 "sd_bootcmd=echo Trying load from SD ..;" \
275 "mmcinfo; mmc read $load_addr " \
276 "$kernel_addr_sd $kernel_size_sd && " \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530277 "env exists secureboot && mmc read $kernelheader_addr_r " \
278 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
279 " && esbc_validate ${kernelheader_addr_r};" \
Shengzhou Liu47e7e032017-11-09 17:57:56 +0800280 "bootm $load_addr#$board\0"
Qianyu Gong6264ab62017-06-15 11:10:09 +0800281
Sumit Gargc064fc72017-03-30 09:53:13 +0530282#endif
283
Mingkai Hud2396512016-09-07 18:47:28 +0800284/* Monitor Command Prompt */
285#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Sumit Gargc064fc72017-03-30 09:53:13 +0530286
Mingkai Hud2396512016-09-07 18:47:28 +0800287#define CONFIG_SYS_MAXARGS 64 /* max command args */
288
289#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
290
Simon Glass89e0a3a2017-05-17 08:23:10 -0600291#include <asm/arch/soc.h>
292
Mingkai Hud2396512016-09-07 18:47:28 +0800293#endif /* __LS1046A_COMMON_H */