blob: 5a71982775d05aed89962d7fd92ea19fb00e0986 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +05302/*
3 * (C) Copyright 2013 SAMSUNG Electronics
4 * Rajeshwari Shinde <rajeshwari.s@samsung.com>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +05305 */
6
Tom Riniabb9a042024-05-18 20:20:43 -06007#include <common.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +05308#include <cros_ec.h>
Simon Glassed38aef2020-05-10 11:40:03 -06009#include <env.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053010#include <errno.h>
11#include <fdtdec.h>
Simon Glassf11478f2019-12-28 10:45:07 -070012#include <hang.h>
Simon Glassa7b51302019-11-14 12:57:46 -070013#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -060014#include <log.h>
Simon Glass274e0b02020-05-10 11:39:56 -060015#include <net.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053016#include <spi.h>
17#include <tmu.h>
18#include <netdev.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060019#include <asm/global_data.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053020#include <asm/io.h>
Simon Glass37f11622014-10-20 19:48:37 -060021#include <asm/gpio.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053022#include <asm/arch/board.h>
23#include <asm/arch/cpu.h>
24#include <asm/arch/dwmmc.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053025#include <asm/arch/mmc.h>
26#include <asm/arch/pinmux.h>
27#include <asm/arch/power.h>
Ajay Kumar11763482014-09-05 16:53:30 +053028#include <asm/arch/system.h>
Przemyslaw Marczak110aa292015-04-20 20:07:50 +020029#include <i2c.h>
Marek Szyprowskibc4a2e32020-01-17 14:02:44 +010030#include <mmc.h>
31#include <stdio_dev.h>
Lukasz Majewski7573b962015-03-03 17:32:03 +010032#include <usb.h>
Joonyoung Shim95d3a1d2015-05-22 18:14:24 +020033#include <dwc3-uboot.h>
Simon Glassdbd79542020-05-10 11:40:11 -060034#include <linux/delay.h>
Joonyoung Shim95d3a1d2015-05-22 18:14:24 +020035#include <samsung/misc.h>
Thomas Abraham8d84faa2016-04-23 22:18:14 +053036#include <dm/pinctrl.h>
37#include <dm.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053038
39DECLARE_GLOBAL_DATA_PTR;
40
Jeroen Hofstee5cd82942014-10-08 22:57:28 +020041__weak int exynos_early_init_f(void)
Piotr Wilczek942d0a92014-03-07 14:59:43 +010042{
43 return 0;
44}
Piotr Wilczek942d0a92014-03-07 14:59:43 +010045
Tom Rini757dc982023-09-21 19:32:48 -040046__weak void exynos_init(void)
47{
48}
49
Jeroen Hofstee5cd82942014-10-08 22:57:28 +020050__weak int exynos_power_init(void)
Piotr Wilczek942d0a92014-03-07 14:59:43 +010051{
52 return 0;
53}
Piotr Wilczek942d0a92014-03-07 14:59:43 +010054
Marek Szyprowskibc4a2e32020-01-17 14:02:44 +010055/**
56 * get_boot_mmc_dev() - read boot MMC device id from XOM[7:5] pins.
57 */
58static int get_boot_mmc_dev(void)
59{
60 u32 mode = readl(EXYNOS4_OP_MODE) & 0x1C;
61
62 if (mode == 0x04)
63 return 2; /* MMC2: SD */
64
65 /* MMC0: eMMC or unknown */
66 return 0;
67}
68
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053069#if defined CONFIG_EXYNOS_TMU
70/* Boot Time Thermal Analysis for SoC temperature threshold breach */
71static void boot_temp_check(void)
72{
73 int temp;
74
75 switch (tmu_monitor(&temp)) {
76 case TMU_STATUS_NORMAL:
77 break;
78 case TMU_STATUS_TRIPPED:
79 /*
80 * Status TRIPPED ans WARNING means corresponding threshold
81 * breach
82 */
83 puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
84 set_ps_hold_ctrl();
85 hang();
86 break;
87 case TMU_STATUS_WARNING:
88 puts("EXYNOS_TMU: WARNING! Temperature very high\n");
89 break;
90 case TMU_STATUS_INIT:
91 /*
92 * TMU_STATUS_INIT means something is wrong with temperature
93 * sensing and TMU status was changed back from NORMAL to INIT.
94 */
95 puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n");
96 break;
97 default:
98 debug("EXYNOS_TMU: Unknown TMU state\n");
99 }
100}
101#endif
102
103int board_init(void)
104{
105 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
106#if defined CONFIG_EXYNOS_TMU
107 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
108 debug("%s: Failed to init TMU\n", __func__);
109 return -1;
110 }
111 boot_temp_check();
112#endif
Tom Rini5c1e7272022-04-06 10:33:32 -0400113#if CONFIG_VAL(SYS_MEM_TOP_HIDE)
Przemyslaw Marczakc32a04c2015-02-17 14:50:25 +0100114 /* The last few MB of memory can be reserved for secure firmware */
Tom Rini5c1e7272022-04-06 10:33:32 -0400115 ulong size = CONFIG_SYS_MEM_TOP_HIDE;
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530116
Przemyslaw Marczakc32a04c2015-02-17 14:50:25 +0100117 gd->ram_size -= size;
118 gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size;
119#endif
Tom Rini757dc982023-09-21 19:32:48 -0400120 exynos_init();
121
122 return 0;
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530123}
124
125int dram_init(void)
126{
Ɓukasz Majewski33d7a192015-03-04 10:54:48 +0100127 unsigned int i;
Thomas Abraham8d84faa2016-04-23 22:18:14 +0530128 unsigned long addr;
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530129
130 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
Tom Rinibb4dd962022-11-16 13:10:37 -0500131 addr = CFG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530132 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
133 }
134 return 0;
135}
136
Simon Glass2f949c32017-03-31 08:40:32 -0600137int dram_init_banksize(void)
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530138{
Ɓukasz Majewski33d7a192015-03-04 10:54:48 +0100139 unsigned int i;
Thomas Abraham8d84faa2016-04-23 22:18:14 +0530140 unsigned long addr, size;
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530141
142 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
Tom Rinibb4dd962022-11-16 13:10:37 -0500143 addr = CFG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530144 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
145
146 gd->bd->bi_dram[i].start = addr;
147 gd->bd->bi_dram[i].size = size;
148 }
Simon Glass2f949c32017-03-31 08:40:32 -0600149
150 return 0;
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530151}
152
153static int board_uart_init(void)
154{
Thomas Abraham8d84faa2016-04-23 22:18:14 +0530155#ifndef CONFIG_PINCTRL_EXYNOS
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530156 int err, uart_id, ret = 0;
157
158 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
159 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
160 if (err) {
161 debug("UART%d not configured\n",
162 (uart_id - PERIPH_ID_UART0));
163 ret |= err;
164 }
165 }
166 return ret;
Thomas Abraham8d84faa2016-04-23 22:18:14 +0530167#else
168 return 0;
169#endif
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530170}
171
172#ifdef CONFIG_BOARD_EARLY_INIT_F
173int board_early_init_f(void)
174{
175 int err;
Przemyslaw Marczak4d2a92c2014-09-01 13:50:49 +0200176#ifdef CONFIG_BOARD_TYPES
177 set_board_type();
178#endif
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530179 err = board_uart_init();
180 if (err) {
181 debug("UART init failed\n");
182 return err;
183 }
184
Piotr Wilczek942d0a92014-03-07 14:59:43 +0100185 return exynos_early_init_f();
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530186}
187#endif
188
Simon Glass31339412021-08-08 12:20:27 -0600189#if CONFIG_IS_ENABLED(POWER_LEGACY) || CONFIG_IS_ENABLED(DM_PMIC)
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530190int power_init_board(void)
191{
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530192 set_ps_hold_ctrl();
193
Piotr Wilczek942d0a92014-03-07 14:59:43 +0100194 return exynos_power_init();
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530195}
196#endif
197
Krzysztof Kozlowskic51bd0b2019-03-06 19:37:52 +0100198#if defined(CONFIG_DISPLAY_BOARDINFO) || defined(CONFIG_DISPLAY_BOARDINFO_LATE)
Piotr Wilczek3df7aff2014-03-07 14:59:42 +0100199int checkboard(void)
200{
Simon Glass6ceeff42019-01-11 18:37:07 -0700201 if (IS_ENABLED(CONFIG_BOARD_TYPES)) {
Krzysztof Kozlowski36476ee2019-03-06 19:37:51 +0100202 const char *board_info;
203
204 if (IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
205 /*
206 * Printing type requires having revision, although
207 * this will succeed only if done late.
208 * Otherwise revision will be set in misc_init_r().
209 */
210 set_board_revision();
211 }
212
213 board_info = get_board_type();
Simon Glass6ceeff42019-01-11 18:37:07 -0700214
215 if (board_info)
216 printf("Type: %s\n", board_info);
217 }
Piotr Wilczek3df7aff2014-03-07 14:59:42 +0100218
Piotr Wilczek3df7aff2014-03-07 14:59:42 +0100219 return 0;
220}
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530221#endif
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530222
223#ifdef CONFIG_BOARD_LATE_INIT
224int board_late_init(void)
225{
Simon Glassfe3f6432018-11-06 15:21:26 -0700226 struct udevice *dev;
227 int ret;
Marek Szyprowskibc4a2e32020-01-17 14:02:44 +0100228 int mmcbootdev = get_boot_mmc_dev();
229 char mmcbootdev_str[16];
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530230
Simon Glassfe3f6432018-11-06 15:21:26 -0700231 ret = uclass_first_device_err(UCLASS_CROS_EC, &dev);
Henrik Grimlerd13e0fc2023-05-09 21:05:47 +0200232 if (ret && ret != -ENODEV && ret != -EPFNOSUPPORT) {
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530233 /* Force console on */
234 gd->flags &= ~GD_FLG_SILENT;
235
Simon Glassfe3f6432018-11-06 15:21:26 -0700236 printf("cros-ec communications failure %d\n", ret);
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530237 puts("\nPlease reset with Power+Refresh\n\n");
238 panic("Cannot init cros-ec device");
239 return -1;
240 }
Marek Szyprowskibc4a2e32020-01-17 14:02:44 +0100241
242 printf("Boot device: MMC(%u)\n", mmcbootdev);
243 sprintf(mmcbootdev_str, "%u", mmcbootdev);
244 env_set("mmcbootdev", mmcbootdev_str);
245
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530246 return 0;
247}
248#endif
249
Piotr Wilczek2c3eed52014-03-07 14:59:45 +0100250#ifdef CONFIG_MISC_INIT_R
251int misc_init_r(void)
252{
Krzysztof Kozlowski36476ee2019-03-06 19:37:51 +0100253 if (IS_ENABLED(CONFIG_BOARD_TYPES) &&
254 !IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
255 /*
256 * If revision was not set by late display boardinfo,
257 * set it here. At this point regulators should be already
258 * available.
259 */
260 set_board_revision();
261 }
262
Piotr Wilczek2c3eed52014-03-07 14:59:45 +0100263#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
264 set_board_info();
265#endif
Piotr Wilczek2c3eed52014-03-07 14:59:45 +0100266#ifdef CONFIG_CMD_BMP
267 if (panel_info.logo_on)
268 draw_logo();
269#endif
270 return 0;
271}
272#endif
Joonyoung Shim7a3e8062015-01-15 11:45:56 +0900273
274void reset_misc(void)
275{
276 struct gpio_desc gpio = {};
277 int node;
278
279 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
280 "samsung,emmc-reset");
281 if (node < 0)
282 return;
283
Simon Glass1d9af1f2017-05-30 21:47:09 -0600284 gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpio", 0,
285 &gpio, GPIOD_IS_OUT);
Joonyoung Shim7a3e8062015-01-15 11:45:56 +0900286
287 if (dm_gpio_is_valid(&gpio)) {
288 /*
289 * Reset eMMC
290 *
291 * FIXME: Need to optimize delay time. Minimum 1usec pulse is
292 * required by 'JEDEC Standard No.84-A441' (eMMC)
293 * document but real delay time is expected to greater
294 * than 1usec.
295 */
296 dm_gpio_set_value(&gpio, 0);
297 mdelay(10);
298 dm_gpio_set_value(&gpio, 1);
299 }
300}
Lukasz Majewski7573b962015-03-03 17:32:03 +0100301
302int board_usb_cleanup(int index, enum usb_init_type init)
303{
Joonyoung Shim95d3a1d2015-05-22 18:14:24 +0200304#ifdef CONFIG_USB_DWC3
305 dwc3_uboot_exit(index);
306#endif
Lukasz Majewski7573b962015-03-03 17:32:03 +0100307 return 0;
308}
Marek Szyprowskibc4a2e32020-01-17 14:02:44 +0100309
310int mmc_get_env_dev(void)
311{
312 return get_boot_mmc_dev();
313}