| Jagan Teki | 783acfd | 2020-01-09 14:22:17 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ |
| 2 | /* |
| 3 | * (C) Copyright 2019 Amarula Solutions. |
| 4 | * Author: Jagan Teki <jagan@amarulasolutions.com> |
| 5 | */ |
| 6 | |
| 7 | #ifndef _ROCKCHIP_CLOCK_H |
| 8 | #define _ROCKCHIP_CLOCK_H |
| 9 | |
| Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 10 | #ifndef __ASSEMBLY__ |
| 11 | #include <linux/bitops.h> |
| 12 | #endif |
| 13 | |
| Jagan Teki | 783acfd | 2020-01-09 14:22:17 +0530 | [diff] [blame] | 14 | #if defined(CONFIG_ROCKCHIP_RK3288) |
| 15 | # include <asm/arch-rockchip/cru_rk3288.h> |
| 16 | #elif defined(CONFIG_ROCKCHIP_RK3399) |
| 17 | # include <asm/arch-rockchip/cru_rk3399.h> |
| Anton | 9a95efd | 2023-08-07 10:04:46 +0300 | [diff] [blame] | 18 | #elif defined(CONFIG_ROCKCHIP_RK3568) |
| 19 | #include <asm/arch-rockchip/cru_rk3568.h> |
| Jagan Teki | 783acfd | 2020-01-09 14:22:17 +0530 | [diff] [blame] | 20 | #endif |
| 21 | |
| Jagan Teki | 4fe57d2 | 2020-01-09 14:22:18 +0530 | [diff] [blame] | 22 | /* CRU_GLB_RST_ST */ |
| 23 | enum { |
| 24 | GLB_POR_RST, |
| 25 | FST_GLB_RST_ST = BIT(0), |
| 26 | SND_GLB_RST_ST = BIT(1), |
| 27 | FST_GLB_TSADC_RST_ST = BIT(2), |
| 28 | SND_GLB_TSADC_RST_ST = BIT(3), |
| 29 | FST_GLB_WDT_RST_ST = BIT(4), |
| 30 | SND_GLB_WDT_RST_ST = BIT(5), |
| Jagan Teki | 4fe57d2 | 2020-01-09 14:22:18 +0530 | [diff] [blame] | 31 | }; |
| 32 | |
| Jagan Teki | 783acfd | 2020-01-09 14:22:17 +0530 | [diff] [blame] | 33 | #define MHz 1000000 |
| 34 | |
| Jagan Teki | 5bbc86b | 2020-07-21 20:36:03 +0530 | [diff] [blame] | 35 | char *get_reset_cause(void); |
| 36 | |
| Jagan Teki | 783acfd | 2020-01-09 14:22:17 +0530 | [diff] [blame] | 37 | #endif /* _ROCKCHIP_CLOCK_H */ |