Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Linus Walleij | 717b0a8 | 2012-08-04 05:21:28 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2012 |
| 4 | * Linaro |
| 5 | * Linus Walleij <linus.walleij@linaro.org> |
| 6 | * Common ARM Integrator configuration settings |
Linus Walleij | 717b0a8 | 2012-08-04 05:21:28 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
Linus Walleij | 717b0a8 | 2012-08-04 05:21:28 +0000 | [diff] [blame] | 9 | #define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */ |
Linus Walleij | 717b0a8 | 2012-08-04 05:21:28 +0000 | [diff] [blame] | 10 | |
Linus Walleij | 717b0a8 | 2012-08-04 05:21:28 +0000 | [diff] [blame] | 11 | /* |
Linus Walleij | 717b0a8 | 2012-08-04 05:21:28 +0000 | [diff] [blame] | 12 | * The ARM boot monitor initializes the board. |
| 13 | * However, the default U-Boot code also performs the initialization. |
| 14 | * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT |
| 15 | * - see documentation supplied with board for details of how to choose the |
| 16 | * image to run at reset/power up |
| 17 | * e.g. whether the ARM Boot Monitor runs before U-Boot |
| 18 | */ |
Linus Walleij | 717b0a8 | 2012-08-04 05:21:28 +0000 | [diff] [blame] | 19 | |
| 20 | /* |
| 21 | * The ARM boot monitor does not relocate U-Boot. |
| 22 | * However, the default U-Boot code performs the relocation check, |
| 23 | * and may relocate the code if the memory map is changed. |
| 24 | * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT |
| 25 | */ |
| 26 | /* #define SKIP_CONFIG_RELOCATE_UBOOT */ |
| 27 | |
Linus Walleij | 717b0a8 | 2012-08-04 05:21:28 +0000 | [diff] [blame] | 28 | /* |
| 29 | * Physical Memory Map |
| 30 | */ |
Linus Walleij | 717b0a8 | 2012-08-04 05:21:28 +0000 | [diff] [blame] | 31 | #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ |
| 32 | #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ |
| 33 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 34 | #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE |
| 35 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ |
| 36 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 37 | GENERATED_GBL_DATA_SIZE) |
| 38 | #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET |
Linus Walleij | 48fd615 | 2015-04-05 01:48:33 +0200 | [diff] [blame] | 39 | |
| 40 | /* |
| 41 | * FLASH and environment organization |
| 42 | * Top varies according to amount fitted |
| 43 | * Reserve top 4 blocks of flash |
| 44 | * - ARM Boot Monitor |
| 45 | * - Unused |
| 46 | * - SIB block |
| 47 | * - U-Boot environment |
| 48 | */ |
Linus Walleij | 48fd615 | 2015-04-05 01:48:33 +0200 | [diff] [blame] | 49 | #define CONFIG_SYS_FLASH_BASE 0x24000000 |
Linus Walleij | 48fd615 | 2015-04-05 01:48:33 +0200 | [diff] [blame] | 50 | |
| 51 | /* Timeout values in ticks */ |
| 52 | #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ |
| 53 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ |
Linus Walleij | 48fd615 | 2015-04-05 01:48:33 +0200 | [diff] [blame] | 54 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ |