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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Linus Walleij717b0a82012-08-04 05:21:28 +00002/*
3 * (C) Copyright 2012
4 * Linaro
5 * Linus Walleij <linus.walleij@linaro.org>
6 * Common ARM Integrator configuration settings
Linus Walleij717b0a82012-08-04 05:21:28 +00007 */
8
Linus Walleij717b0a82012-08-04 05:21:28 +00009#define CONFIG_SYS_MEMTEST_START 0x100000
10#define CONFIG_SYS_MEMTEST_END 0x10000000
Linus Walleij717b0a82012-08-04 05:21:28 +000011#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
12#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
Linus Walleij717b0a82012-08-04 05:21:28 +000013#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
14
15#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
16#define CONFIG_SETUP_MEMORY_TAGS
Linus Walleij717b0a82012-08-04 05:21:28 +000017#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
Linus Walleij717b0a82012-08-04 05:21:28 +000018
19/*
20 * There are various dependencies on the core module (CM) fitted
21 * Users should refer to their CM user guide
22 */
23#include "armcoremodule.h"
24
25/*
26 * Initialize and remap the core module, use SPD to detect memory size
27 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
28 * the core module has a CM_INIT register
29 * then the U-Boot initialisation code will
30 * e.g. ARM Boot Monitor or pre-loader is repeated once
31 * (to re-initialise any existing CM_INIT settings to safe values).
32 *
33 * This is usually not the desired behaviour since the platform
34 * will either reboot into the ARM monitor (or pre-loader)
35 * or continuously cycle thru it without U-Boot running,
36 * depending upon the setting of Integrator/CP switch S2-4.
37 *
38 * However it may be needed if Integrator/CP switch S2-1
39 * is set OFF to boot direct into U-Boot.
40 * In that case comment out the line below.
41 */
42#define CONFIG_CM_INIT
43#define CONFIG_CM_REMAP
44#define CONFIG_CM_SPD_DETECT
45
46/*
47 * The ARM boot monitor initializes the board.
48 * However, the default U-Boot code also performs the initialization.
49 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
50 * - see documentation supplied with board for details of how to choose the
51 * image to run at reset/power up
52 * e.g. whether the ARM Boot Monitor runs before U-Boot
53 */
54/* #define CONFIG_SKIP_LOWLEVEL_INIT */
55
56/*
57 * The ARM boot monitor does not relocate U-Boot.
58 * However, the default U-Boot code performs the relocation check,
59 * and may relocate the code if the memory map is changed.
60 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
61 */
62/* #define SKIP_CONFIG_RELOCATE_UBOOT */
63
Linus Walleij717b0a82012-08-04 05:21:28 +000064/*
65 * Physical Memory Map
66 */
67#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
68#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
69#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
70#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
71#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
72#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
73 CONFIG_SYS_INIT_RAM_SIZE - \
74 GENERATED_GBL_DATA_SIZE)
75#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
Linus Walleij48fd6152015-04-05 01:48:33 +020076
77/*
78 * FLASH and environment organization
79 * Top varies according to amount fitted
80 * Reserve top 4 blocks of flash
81 * - ARM Boot Monitor
82 * - Unused
83 * - SIB block
84 * - U-Boot environment
85 */
Linus Walleij48fd6152015-04-05 01:48:33 +020086#define CONFIG_SYS_FLASH_CFI 1
87#define CONFIG_FLASH_CFI_DRIVER 1
88#define CONFIG_SYS_FLASH_BASE 0x24000000
89#define CONFIG_SYS_MAX_FLASH_BANKS 1
90
91/* Timeout values in ticks */
92#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
93#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
94#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
95#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */