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Stefan Agner7b852342018-05-30 19:01:48 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
Marcel Ziswiler05959fc2019-04-09 17:24:14 +02003 * Copyright (C) 2018-2019 Toradex AG
Stefan Agner7b852342018-05-30 19:01:48 +02004 */
Tom Rini41d2d4b2024-04-30 20:43:04 -06005#include <config.h>
Simon Glassa7b51302019-11-14 12:57:46 -07006#include <init.h>
Simon Glass3ba929a2020-10-30 21:38:53 -06007#include <asm/global_data.h>
Simon Glassdbd79542020-05-10 11:40:11 -06008#include <linux/delay.h>
Marcel Ziswiler05959fc2019-04-09 17:24:14 +02009
Stefan Agner7b852342018-05-30 19:01:48 +020010#include <asm/arch/clock.h>
11#include <asm/arch/crm_regs.h>
12#include <asm/arch/imx-regs.h>
13#include <asm/arch-mx6/clock.h>
14#include <asm/arch-mx6/imx-regs.h>
15#include <asm/arch-mx6/mx6ull_pins.h>
16#include <asm/arch/sys_proto.h>
17#include <asm/gpio.h>
18#include <asm/mach-imx/boot_mode.h>
19#include <asm/mach-imx/iomux-v3.h>
20#include <asm/io.h>
Stefan Agner7b852342018-05-30 19:01:48 +020021#include <dm.h>
22#include <dm/platform_data/serial_mxc.h>
Simon Glass5e6201b2019-08-01 09:46:51 -060023#include <env.h>
Stefan Agner7b852342018-05-30 19:01:48 +020024#include <fdt_support.h>
Stefan Agner7b852342018-05-30 19:01:48 +020025#include <imx_thermal.h>
26#include <jffs2/load_kernel.h>
27#include <linux/sizes.h>
Stefan Agner7b852342018-05-30 19:01:48 +020028#include <miiphy.h>
29#include <mtd_node.h>
30#include <netdev.h>
Marcel Ziswiler05959fc2019-04-09 17:24:14 +020031
Stefan Agner7b852342018-05-30 19:01:48 +020032#include "../common/tdx-common.h"
Stefan Agnerbf1f2892019-04-09 17:24:09 +020033#include "../common/tdx-cfg-block.h"
Stefan Agner7b852342018-05-30 19:01:48 +020034
35DECLARE_GLOBAL_DATA_PTR;
36
Stefan Agner7b852342018-05-30 19:01:48 +020037#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
38 PAD_CTL_DSE_48ohm)
39
Philippe Schenkerde51f532019-04-09 17:24:12 +020040#define MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR 0x2290040
41
Stefan Agner7b852342018-05-30 19:01:48 +020042#define NAND_PAD_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
43
44#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP)
45
Max Krummenacher1f6668a2021-10-06 18:55:36 +020046#define FLASH_DETECTION_CTRL (PAD_CTL_HYS | PAD_CTL_PUE)
47#define FLASH_DET_GPIO IMX_GPIO_NR(4, 1)
48static const iomux_v3_cfg_t flash_detection_pads[] = {
49 MX6_PAD_NAND_WE_B__GPIO4_IO01 | MUX_PAD_CTRL(FLASH_DETECTION_CTRL),
50};
51
52static bool is_emmc;
53
Stefan Agner7b852342018-05-30 19:01:48 +020054int dram_init(void)
55{
56 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
57
58 return 0;
59}
60
Stefan Agner7b852342018-05-30 19:01:48 +020061#ifdef CONFIG_NAND_MXS
Stefan Agner7b852342018-05-30 19:01:48 +020062static void setup_gpmi_nand(void)
63{
Philippe Schenker873b9542021-10-15 10:25:51 +020064 setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
65 MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
66 MXC_CCM_CS2CDR_ENFC_CLK_SEL(3)));
Stefan Agner7b852342018-05-30 19:01:48 +020067}
Marcel Ziswiler05959fc2019-04-09 17:24:14 +020068#endif /* CONFIG_NAND_MXS */
Stefan Agner7b852342018-05-30 19:01:48 +020069
Simon Glass52cb5042022-10-18 07:46:31 -060070#ifdef CONFIG_VIDEO
Max Krummenacher1f6668a2021-10-06 18:55:36 +020071static const iomux_v3_cfg_t backlight_pads[] = {
Stefan Agner7b852342018-05-30 19:01:48 +020072 /* Backlight On */
73 MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
74 /* Backlight PWM<A> (multiplexed pin) */
75 MX6_PAD_NAND_WP_B__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
76};
77
78#define GPIO_BL_ON IMX_GPIO_NR(1, 11)
79#define GPIO_PWM_A IMX_GPIO_NR(4, 11)
80
81static int setup_lcd(void)
82{
Stefan Agner7b852342018-05-30 19:01:48 +020083 imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads));
84
85 /* Set BL_ON */
86 gpio_request(GPIO_BL_ON, "BL_ON");
87 gpio_direction_output(GPIO_BL_ON, 1);
88
89 /* Set PWM<A> to full brightness (assuming inversed polarity) */
90 gpio_request(GPIO_PWM_A, "PWM<A>");
91 gpio_direction_output(GPIO_PWM_A, 0);
92
93 return 0;
94}
95#endif
96
Stefan Agner7b852342018-05-30 19:01:48 +020097#ifdef CONFIG_FEC_MXC
Stefan Agner7b852342018-05-30 19:01:48 +020098static int setup_fec(void)
99{
100 struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
101 int ret;
102
Philippe Schenkerc0f15262022-04-08 10:07:11 +0200103 /*
104 * Use 50MHz anatop loopback REF_CLK2 for ENET2,
105 * clear gpr1[14], set gpr1[18].
106 */
107 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
108 IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
109
Stefan Agner7b852342018-05-30 19:01:48 +0200110 ret = enable_fec_anatop_clock(1, ENET_50MHZ);
111 if (ret)
112 return ret;
113
Philippe Schenkerc0f15262022-04-08 10:07:11 +0200114 enable_enet_clk(1);
Stefan Agner7b852342018-05-30 19:01:48 +0200115
Stefan Agner7b852342018-05-30 19:01:48 +0200116 return 0;
117}
Marcel Ziswiler05959fc2019-04-09 17:24:14 +0200118#endif /* CONFIG_FEC_MXC */
Stefan Agner7b852342018-05-30 19:01:48 +0200119
120int board_init(void)
121{
122 /* address of boot parameters */
123 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
124
Max Krummenacher1f6668a2021-10-06 18:55:36 +0200125 /*
126 * Enable GPIO on NAND_WE_B/eMMC_RST with 100k pull-down. eMMC_RST
127 * is pulled high with 4.7k for eMMC devices. This allows to reliably
128 * detect eMMC/NAND flash
129 */
130 imx_iomux_v3_setup_multiple_pads(flash_detection_pads, ARRAY_SIZE(flash_detection_pads));
131 gpio_request(FLASH_DET_GPIO, "flash-detection-gpio");
132 is_emmc = gpio_get_value(FLASH_DET_GPIO);
133 gpio_free(FLASH_DET_GPIO);
134
Stefan Agner7b852342018-05-30 19:01:48 +0200135#ifdef CONFIG_FEC_MXC
136 setup_fec();
137#endif
138
139#ifdef CONFIG_NAND_MXS
140 setup_gpmi_nand();
141#endif
Stefan Agner7b852342018-05-30 19:01:48 +0200142 return 0;
143}
144
145#ifdef CONFIG_CMD_BMODE
146/* TODO */
147static const struct boot_mode board_boot_modes[] = {
148 /* 4 bit bus width */
149 {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)},
150 {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)},
151 {NULL, 0},
152};
153#endif
154
155int board_late_init(void)
156{
Stefan Agnerbf1f2892019-04-09 17:24:09 +0200157#ifdef CONFIG_TDX_CFG_BLOCK
158 /*
159 * If we have a valid config block and it says we are a module with
160 * Wi-Fi/Bluetooth make sure we use the -wifi device tree.
161 */
162 if (tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT_IT ||
Max Krummenacher1f6668a2021-10-06 18:55:36 +0200163 tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT) {
Stefan Agner7b852342018-05-30 19:01:48 +0200164 env_set("variant", "-wifi");
Max Krummenacher1f6668a2021-10-06 18:55:36 +0200165 } else {
166 if (is_emmc)
167 env_set("variant", "-emmc");
Philippe Schenker76d31f52022-04-08 10:07:08 +0200168 else
169 env_set("variant", "");
Max Krummenacher1f6668a2021-10-06 18:55:36 +0200170 }
171#else
172 if (is_emmc)
173 env_set("variant", "-emmc");
Philippe Schenker76d31f52022-04-08 10:07:08 +0200174 else
175 env_set("variant", "");
Stefan Agnerbf1f2892019-04-09 17:24:09 +0200176#endif
Stefan Agner7b852342018-05-30 19:01:48 +0200177
Philippe Schenkerde51f532019-04-09 17:24:12 +0200178 /*
179 * Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the
180 * SOC to request for a lower voltage during sleep. This is necessary
181 * because the voltage is changing too slow for the SOC to wake up
182 * properly.
183 */
184 __raw_writel(0x8080, MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR);
185
Stefan Agner7b852342018-05-30 19:01:48 +0200186#ifdef CONFIG_CMD_BMODE
187 add_board_boot_modes(board_boot_modes);
188#endif
189
Hiago De Francoc3615822023-11-09 13:24:01 -0300190 if (IS_ENABLED(CONFIG_USB) && is_boot_from_usb()) {
Stefan Agner7b852342018-05-30 19:01:48 +0200191 env_set("bootdelay", "0");
Hiago De Francoc3615822023-11-09 13:24:01 -0300192 if (IS_ENABLED(CONFIG_CMD_USB_SDP)) {
193 printf("Serial Downloader recovery mode, using sdp command\n");
194 env_set("bootcmd", "sdp 0");
195 } else if (IS_ENABLED(CONFIG_CMD_FASTBOOT)) {
196 printf("Fastboot recovery mode, using fastboot command\n");
197 env_set("bootcmd", "fastboot usb 0");
198 }
Stefan Agner7b852342018-05-30 19:01:48 +0200199 }
Stefan Agner7b852342018-05-30 19:01:48 +0200200
Simon Glass52cb5042022-10-18 07:46:31 -0600201#if defined(CONFIG_VIDEO)
Igor Opaniukc8038562020-07-15 13:31:03 +0300202 setup_lcd();
Igor Opaniukc8038562020-07-15 13:31:03 +0300203#endif
204
Stefan Agner7b852342018-05-30 19:01:48 +0200205 return 0;
206}
207
Stefan Agner7b852342018-05-30 19:01:48 +0200208#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900209int ft_board_setup(void *blob, struct bd_info *bd)
Stefan Agner7b852342018-05-30 19:01:48 +0200210{
Stefan Agner7b852342018-05-30 19:01:48 +0200211 return ft_common_board_setup(blob, bd);
212}
213#endif
214
Simon Glassb75b15b2020-12-03 16:55:23 -0700215static struct mxc_serial_plat mxc_serial_plat = {
Stefan Agner7b852342018-05-30 19:01:48 +0200216 .reg = (struct mxc_uart *)UART1_BASE,
217 .use_dte = 1,
218};
219
Simon Glass1d8364a2020-12-28 20:34:54 -0700220U_BOOT_DRVINFO(mxc_serial) = {
Stefan Agner7b852342018-05-30 19:01:48 +0200221 .name = "serial_mxc",
Simon Glass71fa5b42020-12-03 16:55:18 -0700222 .plat = &mxc_serial_plat,
Stefan Agner7b852342018-05-30 19:01:48 +0200223};