Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2019 Toradex |
| 4 | */ |
| 5 | |
Simon Glass | afb0215 | 2019-12-28 10:45:01 -0700 | [diff] [blame] | 6 | #include <cpu_func.h> |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 7 | #include <init.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 8 | #include <asm/global_data.h> |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 9 | |
| 10 | #include <asm/arch/clock.h> |
| 11 | #include <asm/arch/imx8-pins.h> |
| 12 | #include <asm/arch/iomux.h> |
Andrejs Cainikovs | fa7327f | 2023-01-16 20:05:12 +0100 | [diff] [blame] | 13 | #include <asm/arch/snvs_security_sc.h> |
Peng Fan | 2e0644a | 2023-04-28 12:08:09 +0800 | [diff] [blame] | 14 | #include <firmware/imx/sci/sci.h> |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 15 | #include <asm/arch/sys_proto.h> |
| 16 | #include <asm/gpio.h> |
| 17 | #include <asm/io.h> |
Marcel Ziswiler | 79d300c | 2023-01-16 20:04:56 +0100 | [diff] [blame] | 18 | #include <command.h> |
Simon Glass | 5e6201b | 2019-08-01 09:46:51 -0600 | [diff] [blame] | 19 | #include <env.h> |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 20 | #include <errno.h> |
Philippe Schenker | 0e2980d | 2022-05-09 18:58:16 +0200 | [diff] [blame] | 21 | #include <linux/bitops.h> |
Marcel Ziswiler | 79d300c | 2023-01-16 20:04:56 +0100 | [diff] [blame] | 22 | #include <linux/delay.h> |
| 23 | #include <linux/libfdt.h> |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 24 | |
| 25 | #include "../common/tdx-cfg-block.h" |
| 26 | |
| 27 | DECLARE_GLOBAL_DATA_PTR; |
| 28 | |
| 29 | #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ |
| 30 | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ |
| 31 | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ |
| 32 | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) |
| 33 | |
Marcel Ziswiler | 79d300c | 2023-01-16 20:04:56 +0100 | [diff] [blame] | 34 | #define PCB_VERS_DETECT ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ |
| 35 | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ |
| 36 | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ |
| 37 | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) |
| 38 | |
| 39 | #define GPIO_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ |
| 40 | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ |
| 41 | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ |
| 42 | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) |
| 43 | |
| 44 | #define PCB_VERS_DEFAULT ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ |
| 45 | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ |
| 46 | (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT) | \ |
| 47 | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT)) |
| 48 | |
Philippe Schenker | 0e2980d | 2022-05-09 18:58:16 +0200 | [diff] [blame] | 49 | #define TDX_USER_FUSE_BLOCK1_A 276 |
| 50 | #define TDX_USER_FUSE_BLOCK1_B 277 |
| 51 | #define TDX_USER_FUSE_BLOCK2_A 278 |
| 52 | #define TDX_USER_FUSE_BLOCK2_B 279 |
| 53 | |
Marcel Ziswiler | 79d300c | 2023-01-16 20:04:56 +0100 | [diff] [blame] | 54 | enum pcb_rev_t { |
| 55 | PCB_VERSION_1_0, |
| 56 | PCB_VERSION_1_1 |
| 57 | }; |
| 58 | |
| 59 | static iomux_cfg_t pcb_vers_detect[] = { |
| 60 | SC_P_MIPI_DSI0_GPIO0_00 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DETECT), |
| 61 | SC_P_MIPI_DSI0_GPIO0_01 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DETECT), |
| 62 | }; |
| 63 | |
| 64 | static iomux_cfg_t pcb_vers_default[] = { |
| 65 | SC_P_MIPI_DSI0_GPIO0_00 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DEFAULT), |
| 66 | SC_P_MIPI_DSI0_GPIO0_01 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DEFAULT), |
| 67 | }; |
| 68 | |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 69 | static iomux_cfg_t uart1_pads[] = { |
| 70 | SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 71 | SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 72 | }; |
| 73 | |
Philippe Schenker | 0e2980d | 2022-05-09 18:58:16 +0200 | [diff] [blame] | 74 | struct tdx_user_fuses { |
| 75 | u16 pid4; |
| 76 | u16 vers; |
| 77 | u8 ramid; |
| 78 | }; |
| 79 | |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 80 | static void setup_iomux_uart(void) |
| 81 | { |
| 82 | imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); |
| 83 | } |
| 84 | |
Philippe Schenker | 0e2980d | 2022-05-09 18:58:16 +0200 | [diff] [blame] | 85 | static uint32_t do_get_tdx_user_fuse(int a, int b) |
| 86 | { |
Peng Fan | e24d0aa | 2023-06-15 18:08:59 +0800 | [diff] [blame] | 87 | int sciErr; |
Philippe Schenker | 0e2980d | 2022-05-09 18:58:16 +0200 | [diff] [blame] | 88 | u32 val_a = 0; |
| 89 | u32 val_b = 0; |
| 90 | |
| 91 | sciErr = sc_misc_otp_fuse_read(-1, a, &val_a); |
Peng Fan | e24d0aa | 2023-06-15 18:08:59 +0800 | [diff] [blame] | 92 | if (sciErr) { |
Philippe Schenker | 0e2980d | 2022-05-09 18:58:16 +0200 | [diff] [blame] | 93 | printf("Error reading out user fuse %d\n", a); |
| 94 | return 0; |
| 95 | } |
| 96 | |
| 97 | sciErr = sc_misc_otp_fuse_read(-1, b, &val_b); |
Peng Fan | e24d0aa | 2023-06-15 18:08:59 +0800 | [diff] [blame] | 98 | if (sciErr) { |
Philippe Schenker | 0e2980d | 2022-05-09 18:58:16 +0200 | [diff] [blame] | 99 | printf("Error reading out user fuse %d\n", b); |
| 100 | return 0; |
| 101 | } |
| 102 | |
| 103 | return ((val_a & 0xffff) << 16) | (val_b & 0xffff); |
| 104 | } |
| 105 | |
| 106 | static void get_tdx_user_fuse(struct tdx_user_fuses *tdxuserfuse) |
| 107 | { |
| 108 | u32 fuse_block; |
| 109 | |
| 110 | fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK2_A, |
| 111 | TDX_USER_FUSE_BLOCK2_B); |
| 112 | |
| 113 | /* |
| 114 | * Fuse block 2 acts as a backup area, if this reads 0 we want to |
| 115 | * use fuse block 1 |
| 116 | */ |
| 117 | if (fuse_block == 0) |
| 118 | fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK1_A, |
| 119 | TDX_USER_FUSE_BLOCK1_B); |
| 120 | |
| 121 | tdxuserfuse->pid4 = (fuse_block >> 18) & GENMASK(13, 0); |
| 122 | tdxuserfuse->vers = (fuse_block >> 4) & GENMASK(13, 0); |
| 123 | tdxuserfuse->ramid = fuse_block & GENMASK(3, 0); |
| 124 | } |
| 125 | |
Igor Opaniuk | 96b90ba | 2020-10-22 11:21:41 +0300 | [diff] [blame] | 126 | void board_mem_get_layout(u64 *phys_sdram_1_start, |
| 127 | u64 *phys_sdram_1_size, |
| 128 | u64 *phys_sdram_2_start, |
| 129 | u64 *phys_sdram_2_size) |
| 130 | { |
| 131 | u32 is_quadplus = 0, val = 0; |
Philippe Schenker | 0e2980d | 2022-05-09 18:58:16 +0200 | [diff] [blame] | 132 | struct tdx_user_fuses tdxramfuses; |
Peng Fan | e24d0aa | 2023-06-15 18:08:59 +0800 | [diff] [blame] | 133 | int scierr = sc_misc_otp_fuse_read(-1, 6, &val); |
Igor Opaniuk | 96b90ba | 2020-10-22 11:21:41 +0300 | [diff] [blame] | 134 | |
Fabio Estevam | 0cada44 | 2024-03-12 21:59:41 -0300 | [diff] [blame] | 135 | if (!scierr) { |
Igor Opaniuk | 96b90ba | 2020-10-22 11:21:41 +0300 | [diff] [blame] | 136 | /* QP has one A72 core disabled */ |
| 137 | is_quadplus = ((val >> 4) & 0x3) != 0x0; |
| 138 | } |
| 139 | |
Philippe Schenker | 0e2980d | 2022-05-09 18:58:16 +0200 | [diff] [blame] | 140 | get_tdx_user_fuse(&tdxramfuses); |
| 141 | |
Igor Opaniuk | 96b90ba | 2020-10-22 11:21:41 +0300 | [diff] [blame] | 142 | *phys_sdram_1_start = PHYS_SDRAM_1; |
| 143 | *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; |
| 144 | *phys_sdram_2_start = PHYS_SDRAM_2; |
Philippe Schenker | 0e2980d | 2022-05-09 18:58:16 +0200 | [diff] [blame] | 145 | |
| 146 | switch (tdxramfuses.ramid) { |
| 147 | case 1: |
| 148 | *phys_sdram_2_size = SZ_2G; |
| 149 | break; |
| 150 | case 2: |
Igor Opaniuk | 96b90ba | 2020-10-22 11:21:41 +0300 | [diff] [blame] | 151 | *phys_sdram_2_size = 0x0UL; |
Philippe Schenker | 0e2980d | 2022-05-09 18:58:16 +0200 | [diff] [blame] | 152 | break; |
| 153 | case 3: |
| 154 | *phys_sdram_2_size = SZ_2G; |
| 155 | break; |
| 156 | case 4: |
| 157 | *phys_sdram_2_size = SZ_4G + SZ_2G; |
| 158 | break; |
| 159 | default: |
| 160 | if (is_quadplus) |
| 161 | /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ |
| 162 | *phys_sdram_2_size = 0x0UL; |
| 163 | else |
| 164 | *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; |
| 165 | break; |
| 166 | } |
Igor Opaniuk | 96b90ba | 2020-10-22 11:21:41 +0300 | [diff] [blame] | 167 | } |
| 168 | |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 169 | int board_early_init_f(void) |
| 170 | { |
Anatolij Gustschin | ef156d2 | 2019-06-12 13:35:25 +0200 | [diff] [blame] | 171 | sc_pm_clock_rate_t rate = SC_80MHZ; |
Philippe Schenker | 8ae977ce | 2023-01-16 20:05:10 +0100 | [diff] [blame] | 172 | int ret; |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 173 | |
Anatolij Gustschin | ef156d2 | 2019-06-12 13:35:25 +0200 | [diff] [blame] | 174 | /* Set UART1 clock root to 80 MHz and enable it */ |
Philippe Schenker | 8ae977ce | 2023-01-16 20:05:10 +0100 | [diff] [blame] | 175 | ret = sc_pm_setup_uart(SC_R_UART_1, rate); |
| 176 | if (ret) |
| 177 | return ret; |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 178 | |
| 179 | setup_iomux_uart(); |
| 180 | |
| 181 | return 0; |
| 182 | } |
| 183 | |
Simon Glass | fa4689a | 2019-12-06 21:41:35 -0700 | [diff] [blame] | 184 | #if CONFIG_IS_ENABLED(DM_GPIO) |
Marcel Ziswiler | d5ee5f8 | 2023-01-16 20:04:57 +0100 | [diff] [blame] | 185 | |
| 186 | #define BKL1_GPIO IMX_GPIO_NR(1, 10) |
| 187 | |
| 188 | static iomux_cfg_t board_gpios[] = { |
| 189 | SC_P_LVDS1_GPIO00 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL), |
| 190 | }; |
| 191 | |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 192 | static void board_gpio_init(void) |
| 193 | { |
Marcel Ziswiler | d5ee5f8 | 2023-01-16 20:04:57 +0100 | [diff] [blame] | 194 | imx8_iomux_setup_multiple_pads(board_gpios, ARRAY_SIZE(board_gpios)); |
| 195 | |
| 196 | gpio_request(BKL1_GPIO, "BKL1_GPIO"); |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 197 | } |
| 198 | #else |
| 199 | static inline void board_gpio_init(void) {} |
| 200 | #endif |
| 201 | |
Marcel Ziswiler | d5ee5f8 | 2023-01-16 20:04:57 +0100 | [diff] [blame] | 202 | /* |
| 203 | * Backlight off before OS handover |
| 204 | */ |
| 205 | void board_preboot_os(void) |
| 206 | { |
| 207 | gpio_direction_output(BKL1_GPIO, 0); |
| 208 | } |
| 209 | |
Marcel Ziswiler | 79d300c | 2023-01-16 20:04:56 +0100 | [diff] [blame] | 210 | static enum pcb_rev_t get_pcb_revision(void) |
| 211 | { |
| 212 | unsigned int pcb_vers = 0; |
| 213 | |
| 214 | imx8_iomux_setup_multiple_pads(pcb_vers_detect, |
| 215 | ARRAY_SIZE(pcb_vers_detect)); |
| 216 | |
| 217 | gpio_request(IMX_GPIO_NR(1, 18), |
| 218 | "PCB version detection on PAD SC_P_MIPI_DSI0_GPIO0_00"); |
| 219 | gpio_request(IMX_GPIO_NR(1, 19), |
| 220 | "PCB version detection on PAD SC_P_MIPI_DSI0_GPIO0_01"); |
| 221 | gpio_direction_input(IMX_GPIO_NR(1, 18)); |
| 222 | gpio_direction_input(IMX_GPIO_NR(1, 19)); |
| 223 | |
| 224 | udelay(1000); |
| 225 | |
| 226 | pcb_vers = gpio_get_value(IMX_GPIO_NR(1, 18)); |
| 227 | pcb_vers |= gpio_get_value(IMX_GPIO_NR(1, 19)) << 1; |
| 228 | |
| 229 | /* Set muxing back to default values for saving energy */ |
| 230 | imx8_iomux_setup_multiple_pads(pcb_vers_default, |
| 231 | ARRAY_SIZE(pcb_vers_default)); |
| 232 | |
| 233 | switch (pcb_vers) { |
| 234 | case 0b11: |
| 235 | return PCB_VERSION_1_0; |
| 236 | case 0b10: |
| 237 | return PCB_VERSION_1_1; |
| 238 | default: |
| 239 | printf("Unknown PCB version=0x%x, default to V1.1\n", pcb_vers); |
| 240 | return PCB_VERSION_1_1; |
| 241 | } |
| 242 | } |
| 243 | |
| 244 | static void select_dt_from_module_version(void) |
| 245 | { |
| 246 | env_set("soc", "imx8qm"); |
| 247 | env_set("variant", "-v1.1"); |
| 248 | |
| 249 | switch (tdx_hw_tag.prodid) { |
| 250 | /* Select Apalis iMX8QM device trees */ |
| 251 | case APALIS_IMX8QM_IT: |
| 252 | case APALIS_IMX8QM_WIFI_BT_IT: |
| 253 | case APALIS_IMX8QM_8GB_WIFI_BT_IT: |
| 254 | if (get_pcb_revision() == PCB_VERSION_1_0) |
| 255 | env_set("variant", ""); |
| 256 | break; |
| 257 | /* Select Apalis iMX8QP device trees */ |
| 258 | case APALIS_IMX8QP_WIFI_BT: |
| 259 | case APALIS_IMX8QP: |
| 260 | env_set("soc", "imx8qp"); |
| 261 | break; |
| 262 | default: |
| 263 | printf("Unknown Apalis iMX8 module\n"); |
| 264 | return; |
| 265 | } |
| 266 | } |
| 267 | |
| 268 | static int do_select_dt_from_module_version(struct cmd_tbl *cmdtp, int flag, |
| 269 | int argc, char * const argv[]) |
| 270 | { |
| 271 | select_dt_from_module_version(); |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 272 | return 0; |
| 273 | } |
| 274 | |
Marcel Ziswiler | 79d300c | 2023-01-16 20:04:56 +0100 | [diff] [blame] | 275 | U_BOOT_CMD(select_dt_from_module_version, CONFIG_SYS_MAXARGS, 1, do_select_dt_from_module_version, |
| 276 | "\n", " - select devicetree from module version" |
| 277 | ); |
| 278 | |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 279 | int board_init(void) |
| 280 | { |
| 281 | board_gpio_init(); |
| 282 | |
Andrejs Cainikovs | fa7327f | 2023-01-16 20:05:12 +0100 | [diff] [blame] | 283 | if (IS_ENABLED(CONFIG_IMX_SNVS_SEC_SC_AUTO)) { |
| 284 | int ret = snvs_security_sc_init(); |
| 285 | |
| 286 | if (ret) |
| 287 | return ret; |
| 288 | } |
| 289 | |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 290 | return 0; |
| 291 | } |
| 292 | |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 293 | #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 294 | int ft_board_setup(void *blob, struct bd_info *bd) |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 295 | { |
| 296 | return ft_common_board_setup(blob, bd); |
| 297 | } |
| 298 | #endif |
| 299 | |
| 300 | int board_mmc_get_env_dev(int devno) |
| 301 | { |
| 302 | return devno; |
| 303 | } |
| 304 | |
| 305 | int board_late_init(void) |
| 306 | { |
| 307 | #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
| 308 | /* TODO move to common */ |
| 309 | env_set("board_name", "Apalis iMX8QM"); |
| 310 | env_set("board_rev", "v1.0"); |
| 311 | #endif |
| 312 | |
Marcel Ziswiler | 28c817f | 2023-01-16 20:04:58 +0100 | [diff] [blame] | 313 | build_info(); |
| 314 | |
Marcel Ziswiler | 79d300c | 2023-01-16 20:04:56 +0100 | [diff] [blame] | 315 | select_dt_from_module_version(); |
| 316 | |
Marcel Ziswiler | 475ceff | 2019-05-31 19:00:20 +0300 | [diff] [blame] | 317 | return 0; |
| 318 | } |