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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Nobuhiro Iwamatsua5413442014-12-02 16:52:20 +09002/*
Nobuhiro Iwamatsu80403952016-04-01 03:51:33 +09003 * board/renesas/rcar-common/common.c
Nobuhiro Iwamatsua5413442014-12-02 16:52:20 +09004 *
5 * Copyright (C) 2013 Renesas Electronics Corporation
6 * Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu4dc515a2016-04-01 03:51:34 +09007 * Copyright (C) 2015 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsua5413442014-12-02 16:52:20 +09008 */
9
10#include <common.h>
Marek Vasut45eaf052019-07-09 01:46:35 +020011#include <dm.h>
12#include <dm/uclass-internal.h>
Nobuhiro Iwamatsua5413442014-12-02 16:52:20 +090013#include <asm/arch/rmobile.h>
Marek Vasut276a1d82019-05-19 23:25:16 +020014
15#ifdef CONFIG_RCAR_GEN3
16
17DECLARE_GLOBAL_DATA_PTR;
18
19/* If the firmware passed a device tree use it for U-Boot DRAM setup. */
20extern u64 rcar_atf_boot_args[];
21
22int dram_init(void)
23{
24 const void *atf_fdt_blob = (const void *)(rcar_atf_boot_args[1]);
25 const void *blob;
26
27 /* Check if ATF passed us DTB. If not, fall back to builtin DTB. */
28 if (fdt_magic(atf_fdt_blob) == FDT_MAGIC)
29 blob = atf_fdt_blob;
30 else
31 blob = gd->fdt_blob;
32
33 return fdtdec_setup_mem_size_base_fdt(blob);
34}
35
36int dram_init_banksize(void)
37{
38 const void *atf_fdt_blob = (const void *)(rcar_atf_boot_args[1]);
39 const void *blob;
40
41 /* Check if ATF passed us DTB. If not, fall back to builtin DTB. */
42 if (fdt_magic(atf_fdt_blob) == FDT_MAGIC)
43 blob = atf_fdt_blob;
44 else
45 blob = gd->fdt_blob;
46
47 fdtdec_setup_memory_banksize_fdt(blob);
48
49 return 0;
50}
Marek Vasut45eaf052019-07-09 01:46:35 +020051
52#if CONFIG_IS_ENABLED(OF_BOARD_SETUP) && CONFIG_IS_ENABLED(PCI)
53int ft_board_setup(void *blob, bd_t *bd)
54{
55 struct udevice *dev;
56 struct uclass *uc;
57 fdt_addr_t regs_addr;
58 int i, off, ret;
59
60 ret = uclass_get(UCLASS_PCI, &uc);
61 if (ret)
62 return ret;
63
64 uclass_foreach_dev(dev, uc) {
65 struct pci_controller hose = { 0 };
66
67 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
68 if (hose.region_count == MAX_PCI_REGIONS) {
69 printf("maximum number of regions parsed, aborting\n");
70 break;
71 }
72
73 if (bd->bi_dram[i].size) {
74 pci_set_region(&hose.regions[hose.region_count++],
75 bd->bi_dram[i].start,
76 bd->bi_dram[i].start,
77 bd->bi_dram[i].size,
78 PCI_REGION_MEM |
79 PCI_REGION_PREFETCH |
80 PCI_REGION_SYS_MEMORY);
81 }
82 }
83
84 regs_addr = devfdt_get_addr_index(dev, 0);
85 off = fdt_node_offset_by_compat_reg(blob,
86 "renesas,pcie-rcar-gen3", regs_addr);
87 if (off < 0) {
88 printf("Failed to find PCIe node@%llx\n", regs_addr);
89 return off;
90 }
91
92 fdt_pci_dma_ranges(blob, off, &hose);
93 }
94
95 return 0;
96}
97#endif
Marek Vasut276a1d82019-05-19 23:25:16 +020098#endif