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Nobuhiro Iwamatsua5413442014-12-02 16:52:20 +09001/*
Nobuhiro Iwamatsu80403952016-04-01 03:51:33 +09002 * board/renesas/rcar-common/common.c
Nobuhiro Iwamatsua5413442014-12-02 16:52:20 +09003 *
4 * Copyright (C) 2013 Renesas Electronics Corporation
5 * Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0
8 */
9
10#include <common.h>
11#include <asm/io.h>
12#include <asm/arch/sys_proto.h>
13#include <asm/arch/rmobile.h>
14#include <asm/arch/rcar-mstp.h>
15
16#define TSTR0 0x04
17#define TSTR0_STR0 0x01
18
Nobuhiro Iwamatsue02f1742014-12-02 16:52:24 +090019static struct mstp_ctl mstptbl[] = {
20 { SMSTPCR0, MSTP0_BITS, CONFIG_SMSTP0_ENA,
21 RMSTPCR0, MSTP0_BITS, CONFIG_RMSTP0_ENA },
22 { SMSTPCR1, MSTP1_BITS, CONFIG_SMSTP1_ENA,
23 RMSTPCR1, MSTP1_BITS, CONFIG_RMSTP1_ENA },
24 { SMSTPCR2, MSTP2_BITS, CONFIG_SMSTP2_ENA,
25 RMSTPCR2, MSTP2_BITS, CONFIG_RMSTP2_ENA },
26 { SMSTPCR3, MSTP3_BITS, CONFIG_SMSTP3_ENA,
27 RMSTPCR3, MSTP3_BITS, CONFIG_RMSTP3_ENA },
28 { SMSTPCR4, MSTP4_BITS, CONFIG_SMSTP4_ENA,
29 RMSTPCR4, MSTP4_BITS, CONFIG_RMSTP4_ENA },
30 { SMSTPCR5, MSTP5_BITS, CONFIG_SMSTP5_ENA,
31 RMSTPCR5, MSTP5_BITS, CONFIG_RMSTP5_ENA },
32 /* No MSTP6 */
33 { SMSTPCR7, MSTP7_BITS, CONFIG_SMSTP7_ENA,
34 RMSTPCR7, MSTP7_BITS, CONFIG_RMSTP7_ENA },
35 { SMSTPCR8, MSTP8_BITS, CONFIG_SMSTP8_ENA,
36 RMSTPCR8, MSTP8_BITS, CONFIG_RMSTP8_ENA },
37 { SMSTPCR9, MSTP9_BITS, CONFIG_SMSTP9_ENA,
38 RMSTPCR9, MSTP9_BITS, CONFIG_RMSTP9_ENA },
39 { SMSTPCR10, MSTP10_BITS, CONFIG_SMSTP10_ENA,
40 RMSTPCR10, MSTP10_BITS, CONFIG_RMSTP10_ENA },
41 { SMSTPCR11, MSTP11_BITS, CONFIG_SMSTP1_ENA,
42 RMSTPCR11, MSTP11_BITS, CONFIG_RMSTP11_ENA },
43};
44
Nobuhiro Iwamatsua5413442014-12-02 16:52:20 +090045void arch_preboot_os(void)
46{
Nobuhiro Iwamatsue02f1742014-12-02 16:52:24 +090047 int i;
48
Nobuhiro Iwamatsua5413442014-12-02 16:52:20 +090049 /* stop TMU0 */
50 mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0);
51
Nobuhiro Iwamatsue02f1742014-12-02 16:52:24 +090052 /* Stop module clock */
53 for (i = 0; i < ARRAY_SIZE(mstptbl); i++) {
54 mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_dis,
55 mstptbl[i].s_ena);
56 mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_dis,
57 mstptbl[i].r_ena);
58 }
Nobuhiro Iwamatsua5413442014-12-02 16:52:20 +090059}