| Heiko Stuebner | fc36785 | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 1 | if ROCKCHIP_PX30 |
| 2 | |
| 3 | config TARGET_EVB_PX30 |
| 4 | bool "EVB_PX30" |
| Jagan Teki | c6e5017 | 2020-10-28 19:03:43 +0530 | [diff] [blame] | 5 | help |
| 6 | This target config option used for below listed px30 boards. |
| 7 | |
| 8 | EVB_PX30: |
| 9 | * EVB_PX30 is an evaluation board for Rockchip PX30. |
| Heiko Stuebner | fc36785 | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 10 | |
| Heiko Stuebner | a9ca71e | 2020-07-01 11:28:42 +0200 | [diff] [blame] | 11 | config TARGET_ODROID_GO2 |
| 12 | bool "ODROID_GO2" |
| 13 | |
| Jagan Teki | 57a0a56 | 2020-10-28 19:03:45 +0530 | [diff] [blame] | 14 | config TARGET_PX30_CORE |
| 15 | bool "Engicam PX30.Core" |
| 16 | help |
| 17 | PX30.Core EDIMM2.2: |
| 18 | * PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. |
| 19 | * EDIMM2.2 is a Form Factor Capacitive Evaluation Board from Engicam. |
| 20 | * PX30.Core needs to mount on top of EDIMM2.2 for creating complete |
| 21 | PX30.Core EDIMM2.2 Starter Kit. |
| 22 | |
| Jagan Teki | c7a3d13 | 2020-10-28 19:03:47 +0530 | [diff] [blame] | 23 | PX30.Core CTOUCH2: |
| 24 | * PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. |
| 25 | * CTOUCH2.0 is a general purpose Carrier board with capacitive |
| 26 | touch interface support. |
| 27 | * PX30.Core needs to mount on top of CTOUCH2.0 for creating complete |
| 28 | PX30.Core C.TOUCH Carrier board. |
| 29 | |
| Jagan Teki | 19e0c95 | 2021-11-15 23:08:21 +0530 | [diff] [blame] | 30 | PX30.Core CTOUCH2-OF10: |
| 31 | * PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. |
| 32 | * CTOUCH2.0 is a general purpose Carrier board with capacitive |
| 33 | touch interface support. |
| 34 | * 10.1" OF is a capacitive touch 10.1" Open Frame panel solutions. |
| 35 | * PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged |
| 36 | 10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame. |
| 37 | |
| Heiko Stuebner | fc36785 | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 38 | config ROCKCHIP_BOOT_MODE_REG |
| 39 | default 0xff010200 |
| 40 | |
| Johan Jonker | f6fc895 | 2022-04-09 18:55:02 +0200 | [diff] [blame] | 41 | config ROCKCHIP_STIMER_BASE |
| 42 | default 0xff220020 |
| 43 | |
| Heiko Stuebner | fc36785 | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 44 | config SYS_SOC |
| 45 | default "px30" |
| 46 | |
| 47 | config SYS_MALLOC_F_LEN |
| 48 | default 0x400 |
| 49 | |
| Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 50 | config SPL_SERIAL |
| Heiko Stuebner | fc36785 | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 51 | default y |
| 52 | |
| 53 | config TPL_LDSCRIPT |
| 54 | default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" |
| 55 | |
| 56 | config TPL_TEXT_BASE |
| 57 | default 0xff0e1000 |
| 58 | |
| 59 | config TPL_MAX_SIZE |
| 60 | default 10240 |
| 61 | |
| 62 | config TPL_STACK |
| 63 | default 0xff0e4fff |
| 64 | |
| Paul Kocialkowski | 7250b23 | 2019-11-28 15:27:51 +0100 | [diff] [blame] | 65 | config DEBUG_UART_CHANNEL |
| 66 | int "Mux channel to use for debug UART2/UART3" |
| Heiko Stuebner | fc36785 | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 67 | depends on DEBUG_UART_BOARD_INIT |
| 68 | default 0 |
| 69 | help |
| Paul Kocialkowski | 7250b23 | 2019-11-28 15:27:51 +0100 | [diff] [blame] | 70 | UART2 and UART3 can use two different set of pins to route the output. |
| Heiko Stuebner | fc36785 | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 71 | For using the UART for early debugging the route to use needs |
| 72 | to be declared (0 or 1). |
| 73 | |
| Jagan Teki | 57a0a56 | 2020-10-28 19:03:45 +0530 | [diff] [blame] | 74 | source "board/engicam/px30_core/Kconfig" |
| Heiko Stuebner | a9ca71e | 2020-07-01 11:28:42 +0200 | [diff] [blame] | 75 | source "board/hardkernel/odroid_go2/Kconfig" |
| Heiko Stuebner | fc36785 | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 76 | source "board/rockchip/evb_px30/Kconfig" |
| 77 | |
| 78 | endif |