rockchip: add px30 architecture core
Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig
new file mode 100644
index 0000000..109a37b
--- /dev/null
+++ b/arch/arm/mach-rockchip/px30/Kconfig
@@ -0,0 +1,41 @@
+if ROCKCHIP_PX30
+
+config TARGET_EVB_PX30
+ bool "EVB_PX30"
+
+config ROCKCHIP_BOOT_MODE_REG
+ default 0xff010200
+
+config SYS_SOC
+ default "px30"
+
+config SYS_MALLOC_F_LEN
+ default 0x400
+
+config SPL_SERIAL_SUPPORT
+ default y
+
+config TPL_LDSCRIPT
+ default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+ default 0xff0e1000
+
+config TPL_MAX_SIZE
+ default 10240
+
+config TPL_STACK
+ default 0xff0e4fff
+
+config DEBUG_UART2_CHANNEL
+ int "Mux channel to use for debug UART2"
+ depends on DEBUG_UART_BOARD_INIT
+ default 0
+ help
+ UART2 can use two different set of pins to route the output.
+ For using the UART for early debugging the route to use needs
+ to be declared (0 or 1).
+
+source "board/rockchip/evb_px30/Kconfig"
+
+endif