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git01.mediatek.com / filogic / uboot / e32cce8680a8fc3aa472758e6c53470b72fea158 / . / board / renesas / alt / qos.c
blob: b8edd5412aa3d6512c31f2ce960a5eeeb92e51db [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]2/*
3 * board/renesas/alt/qos.c
4 *
5 * Copyright (C) 2014 Renesas Electronics Corporation
6 *
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]7 */
8
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]9#include <asm/processor.h>
10#include <asm/mach-types.h>
11#include <asm/io.h>
Marek Vasut97a070b2024-02-27 17:05:54 +0100[diff] [blame]12#include <asm/arch/renesas.h>
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]13
Marek Vasutd26aa8c2024-02-27 17:05:53 +0100[diff] [blame]14#if defined(CONFIG_RENESAS_EXTRAM_BOOT)
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]15/* QoS version 0.311 for ES1 and version 0.321 for ES2 */
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]16
17enum {
18 DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
19 DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
20 DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
21 DBSC3_15,
22 DBSC3_NR,
23};
24
25static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
26 [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
27 [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
28 [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
29 [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
30 [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
31 [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
32 [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
33 [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
34 [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
35 [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
36 [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
37 [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
38 [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
39 [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
40 [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
41 [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
42};
43
44static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
45 [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
46 [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
47 [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
48 [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
49 [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
50 [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
51 [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
52 [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
53 [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
54 [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
55 [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
56 [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
57 [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
58 [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
59 [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
60 [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
61};
62
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]63#if defined(CONFIG_QOS_PRI_MEDIA)
64#define is_qos_pri_media() 1
65#else
66#define is_qos_pri_media() 0
67#endif
68
69#if defined(CONFIG_QOS_PRI_NORMAL)
70#define is_qos_pri_normal() 1
71#else
72#define is_qos_pri_normal() 0
73#endif
74
75#if defined(CONFIG_QOS_PRI_GFX)
76#define is_qos_pri_gfx() 1
77#else
78#define is_qos_pri_gfx() 0
79#endif
80
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]81void qos_init(void)
82{
83 int i;
84 struct rcar_s3c *s3c;
85 struct rcar_s3c_qos *s3c_qos;
86 struct rcar_dbsc3_qos *qos_addr;
87 struct rcar_mxi *mxi;
88 struct rcar_mxi_qos *mxi_qos;
89 struct rcar_axi_qos *axi_qos;
90
91 /* DBSC DBADJ2 */
92 writel(0x20042004, DBSC3_0_DBADJ2);
93
94 /* S3C -QoS */
95 s3c = (struct rcar_s3c *)S3C_BASE;
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]96 if (is_qos_pri_media()) {
97 writel(0x1F0B0604, &s3c->s3crorr);
98 writel(0x1F0E0705, &s3c->s3cworr);
99 } else if (is_qos_pri_normal()) {
100 writel(0x1F0B0908, &s3c->s3crorr);
101 writel(0x1F0E0A08, &s3c->s3cworr);
102 } else if (is_qos_pri_media()) {
103 writel(0x1F0B0B0B, &s3c->s3crorr);
104 writel(0x1F0E0C0C, &s3c->s3cworr);
105 }
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]106 /* QoS Control Registers */
107 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
108 writel(0x00890089, &s3c_qos->s3cqos0);
109 writel(0x20960010, &s3c_qos->s3cqos1);
110 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]111 if (is_qos_pri_media())
112 writel(0x20AA2300, &s3c_qos->s3cqos3);
113 else if (is_qos_pri_normal())
114 writel(0x20AA2200, &s3c_qos->s3cqos3);
115 else if (is_qos_pri_media())
116 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]117 writel(0x00002032, &s3c_qos->s3cqos4);
118 writel(0x20960010, &s3c_qos->s3cqos5);
119 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]120 if (is_qos_pri_media())
121 writel(0x20AA2300, &s3c_qos->s3cqos7);
122 else if (is_qos_pri_normal())
123 writel(0x20AA2200, &s3c_qos->s3cqos7);
124 else if (is_qos_pri_gfx())
125 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]126 writel(0x00002032, &s3c_qos->s3cqos8);
127
128 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
129 writel(0x00890089, &s3c_qos->s3cqos0);
130 writel(0x20960010, &s3c_qos->s3cqos1);
131 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]132 if (is_qos_pri_media())
133 writel(0x20AA2300, &s3c_qos->s3cqos3);
134 else if (is_qos_pri_normal())
135 writel(0x20AA2200, &s3c_qos->s3cqos3);
136 else if (is_qos_pri_gfx())
137 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]138 writel(0x00002032, &s3c_qos->s3cqos4);
139 writel(0x20960010, &s3c_qos->s3cqos5);
140 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]141 if (is_qos_pri_media())
142 writel(0x20AA2300, &s3c_qos->s3cqos7);
143 else if (is_qos_pri_media())
144 writel(0x20AA2200, &s3c_qos->s3cqos7);
145 else if (is_qos_pri_media())
146 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]147 writel(0x00002032, &s3c_qos->s3cqos8);
148
149 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
150 writel(0x80928092, &s3c_qos->s3cqos0);
151 writel(0x20960020, &s3c_qos->s3cqos1);
152 writel(0x20302030, &s3c_qos->s3cqos2);
153 writel(0x20AA20DC, &s3c_qos->s3cqos3);
154 writel(0x00002032, &s3c_qos->s3cqos4);
155 writel(0x20960020, &s3c_qos->s3cqos5);
156 writel(0x20302030, &s3c_qos->s3cqos6);
157 writel(0x20AA20DC, &s3c_qos->s3cqos7);
158 writel(0x00002032, &s3c_qos->s3cqos8);
159
160 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]161 writel(0x00820092, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]162 writel(0x20960020, &s3c_qos->s3cqos1);
163 writel(0x20302030, &s3c_qos->s3cqos2);
164 writel(0x20AA20FA, &s3c_qos->s3cqos3);
165 writel(0x00002032, &s3c_qos->s3cqos4);
166 writel(0x20960020, &s3c_qos->s3cqos5);
167 writel(0x20302030, &s3c_qos->s3cqos6);
168 writel(0x20AA20FA, &s3c_qos->s3cqos7);
169 writel(0x00002032, &s3c_qos->s3cqos8);
170
171 /* DBSC -QoS */
172 /* DBSC0 - Read */
173 for (i = DBSC3_00; i < DBSC3_NR; i++) {
174 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
175 writel(0x00000002, &qos_addr->dblgcnt);
176 writel(0x0000207D, &qos_addr->dbtmval0);
177 writel(0x00002053, &qos_addr->dbtmval1);
178 writel(0x0000202A, &qos_addr->dbtmval2);
179 writel(0x00001FBD, &qos_addr->dbtmval3);
180 writel(0x00000001, &qos_addr->dbrqctr);
181 writel(0x00002064, &qos_addr->dbthres0);
182 writel(0x0000203E, &qos_addr->dbthres1);
183 writel(0x00002019, &qos_addr->dbthres2);
184 writel(0x00000001, &qos_addr->dblgqon);
185 }
186
187 /* DBSC0 - Write */
188 for (i = DBSC3_00; i < DBSC3_NR; i++) {
189 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
190 writel(0x00000002, &qos_addr->dblgcnt);
191 writel(0x0000207D, &qos_addr->dbtmval0);
192 writel(0x00002053, &qos_addr->dbtmval1);
193 writel(0x00002043, &qos_addr->dbtmval2);
194 writel(0x00002030, &qos_addr->dbtmval3);
195 writel(0x00000001, &qos_addr->dbrqctr);
196 writel(0x00002064, &qos_addr->dbthres0);
197 writel(0x0000203E, &qos_addr->dbthres1);
198 writel(0x00002031, &qos_addr->dbthres2);
199 writel(0x00000001, &qos_addr->dblgqon);
200 }
201
202 /* CCI-400 -QoS */
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]203 if (IS_R8A7794_ES2()) {
204 writel(0x20001000, CCI_400_MAXOT_1);
205 writel(0x20001000, CCI_400_MAXOT_2);
206 } else {
207 writel(0x20000800, CCI_400_MAXOT_1);
208 writel(0x20000800, CCI_400_MAXOT_2);
209 }
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]210 writel(0x0000000C, CCI_400_QOSCNTL_1);
211 writel(0x0000000C, CCI_400_QOSCNTL_2);
212
213 /* MXI -QoS */
214 /* Transaction Control (MXI) */
215 mxi = (struct rcar_mxi *)MXI_BASE;
216 writel(0x00000013, &mxi->mxrtcr);
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]217 writel(0x00000016, &mxi->mxwtcr);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]218 writel(0x00780080, &mxi->mxsaar0);
219 writel(0x02000800, &mxi->mxsaar1);
220
221 /* QoS Control (MXI) */
222 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
223 writel(0x0000000C, &mxi_qos->vspdu0);
224 writel(0x0000000E, &mxi_qos->du0);
225
226 /* AXI -QoS */
227 /* Transaction Control (MXI) */
228 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
229 writel(0x00000002, &axi_qos->qosconf);
230 writel(0x00002245, &axi_qos->qosctset0);
231 writel(0x00002096, &axi_qos->qosctset1);
232 writel(0x00002030, &axi_qos->qosctset2);
233 writel(0x00002030, &axi_qos->qosctset3);
234 writel(0x00000001, &axi_qos->qosreqctr);
235 writel(0x00002064, &axi_qos->qosthres0);
236 writel(0x00002004, &axi_qos->qosthres1);
237 writel(0x00000000, &axi_qos->qosthres2);
238 writel(0x00000001, &axi_qos->qosqon);
239
240 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
241 writel(0x00000000, &axi_qos->qosconf);
242 writel(0x000020A6, &axi_qos->qosctset0);
243 writel(0x00000001, &axi_qos->qosreqctr);
244 writel(0x00002064, &axi_qos->qosthres0);
245 writel(0x00002004, &axi_qos->qosthres1);
246 writel(0x00000000, &axi_qos->qosthres2);
247 writel(0x00000001, &axi_qos->qosqon);
248
249 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
250 writel(0x00000002, &axi_qos->qosconf);
251 writel(0x00002245, &axi_qos->qosctset0);
252 writel(0x00002096, &axi_qos->qosctset1);
253 writel(0x00002030, &axi_qos->qosctset2);
254 writel(0x00002030, &axi_qos->qosctset3);
255 writel(0x00000001, &axi_qos->qosreqctr);
256 writel(0x00002064, &axi_qos->qosthres0);
257 writel(0x00002004, &axi_qos->qosthres1);
258 writel(0x00000000, &axi_qos->qosthres2);
259 writel(0x00000001, &axi_qos->qosqon);
260
261 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
262 writel(0x00000002, &axi_qos->qosconf);
263 writel(0x00002245, &axi_qos->qosctset0);
264 writel(0x00002096, &axi_qos->qosctset1);
265 writel(0x00002030, &axi_qos->qosctset2);
266 writel(0x00002030, &axi_qos->qosctset3);
267 writel(0x00000001, &axi_qos->qosreqctr);
268 writel(0x00002064, &axi_qos->qosthres0);
269 writel(0x00002004, &axi_qos->qosthres1);
270 writel(0x00000000, &axi_qos->qosthres2);
271 writel(0x00000001, &axi_qos->qosqon);
272
273 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
274 writel(0x00000002, &axi_qos->qosconf);
275 writel(0x00002245, &axi_qos->qosctset0);
276 writel(0x00002096, &axi_qos->qosctset1);
277 writel(0x00002030, &axi_qos->qosctset2);
278 writel(0x00002030, &axi_qos->qosctset3);
279 writel(0x00000001, &axi_qos->qosreqctr);
280 writel(0x00002064, &axi_qos->qosthres0);
281 writel(0x00002004, &axi_qos->qosthres1);
282 writel(0x00000000, &axi_qos->qosthres2);
283 writel(0x00000001, &axi_qos->qosqon);
284
285 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
286 writel(0x00000000, &axi_qos->qosconf);
287 writel(0x0000214C, &axi_qos->qosctset0);
288 writel(0x00000001, &axi_qos->qosreqctr);
289 writel(0x00002064, &axi_qos->qosthres0);
290 writel(0x00002004, &axi_qos->qosthres1);
291 writel(0x00000000, &axi_qos->qosthres2);
292 writel(0x00000001, &axi_qos->qosqon);
293
294 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
295 writel(0x00000001, &axi_qos->qosconf);
296 writel(0x00002004, &axi_qos->qosctset0);
297 writel(0x00002096, &axi_qos->qosctset1);
298 writel(0x00002030, &axi_qos->qosctset2);
299 writel(0x00002030, &axi_qos->qosctset3);
300 writel(0x00000001, &axi_qos->qosreqctr);
301 writel(0x00002064, &axi_qos->qosthres0);
302 writel(0x00002004, &axi_qos->qosthres1);
303 writel(0x00000000, &axi_qos->qosthres2);
304 writel(0x00000001, &axi_qos->qosqon);
305
306 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
307 writel(0x00000001, &axi_qos->qosconf);
308 writel(0x00002004, &axi_qos->qosctset0);
309 writel(0x00002096, &axi_qos->qosctset1);
310 writel(0x00002030, &axi_qos->qosctset2);
311 writel(0x00002030, &axi_qos->qosctset3);
312 writel(0x00000001, &axi_qos->qosreqctr);
313 writel(0x00002064, &axi_qos->qosthres0);
314 writel(0x00002004, &axi_qos->qosthres1);
315 writel(0x00000000, &axi_qos->qosthres2);
316 writel(0x00000001, &axi_qos->qosqon);
317
318 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
319 writel(0x00000001, &axi_qos->qosconf);
320 writel(0x00002004, &axi_qos->qosctset0);
321 writel(0x00002096, &axi_qos->qosctset1);
322 writel(0x00002030, &axi_qos->qosctset2);
323 writel(0x00002030, &axi_qos->qosctset3);
324 writel(0x00000001, &axi_qos->qosreqctr);
325 writel(0x00002064, &axi_qos->qosthres0);
326 writel(0x00002004, &axi_qos->qosthres1);
327 writel(0x00000000, &axi_qos->qosthres2);
328 writel(0x00000001, &axi_qos->qosqon);
329
330 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
331 writel(0x00000001, &axi_qos->qosconf);
332 writel(0x00002004, &axi_qos->qosctset0);
333 writel(0x00002096, &axi_qos->qosctset1);
334 writel(0x00002030, &axi_qos->qosctset2);
335 writel(0x00002030, &axi_qos->qosctset3);
336 writel(0x00000001, &axi_qos->qosreqctr);
337 writel(0x00002064, &axi_qos->qosthres0);
338 writel(0x00002004, &axi_qos->qosthres1);
339 writel(0x00000000, &axi_qos->qosthres2);
340 writel(0x00000001, &axi_qos->qosqon);
341
342 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
343 writel(0x00000002, &axi_qos->qosconf);
344 writel(0x00002245, &axi_qos->qosctset0);
345 writel(0x00002096, &axi_qos->qosctset1);
346 writel(0x00002030, &axi_qos->qosctset2);
347 writel(0x00002030, &axi_qos->qosctset3);
348 writel(0x00000001, &axi_qos->qosreqctr);
349 writel(0x00002064, &axi_qos->qosthres0);
350 writel(0x00002004, &axi_qos->qosthres1);
351 writel(0x00000000, &axi_qos->qosthres2);
352 writel(0x00000001, &axi_qos->qosqon);
353
354 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
355 writel(0x00000000, &axi_qos->qosconf);
356 writel(0x000020A6, &axi_qos->qosctset0);
357 writel(0x00000001, &axi_qos->qosreqctr);
358 writel(0x00002064, &axi_qos->qosthres0);
359 writel(0x00002004, &axi_qos->qosthres1);
360 writel(0x00000000, &axi_qos->qosthres2);
361 writel(0x00000001, &axi_qos->qosqon);
362
363 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
364 writel(0x00000000, &axi_qos->qosconf);
365 writel(0x000020A6, &axi_qos->qosctset0);
366 writel(0x00000001, &axi_qos->qosreqctr);
367 writel(0x00002064, &axi_qos->qosthres0);
368 writel(0x00002004, &axi_qos->qosthres1);
369 writel(0x00000000, &axi_qos->qosthres2);
370 writel(0x00000001, &axi_qos->qosqon);
371
372 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
373 writel(0x00000000, &axi_qos->qosconf);
374 writel(0x00002053, &axi_qos->qosctset0);
375 writel(0x00000001, &axi_qos->qosreqctr);
376 writel(0x00002064, &axi_qos->qosthres0);
377 writel(0x00002004, &axi_qos->qosthres1);
378 writel(0x00000000, &axi_qos->qosthres2);
379 writel(0x00000001, &axi_qos->qosqon);
380
381 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
382 writel(0x00000000, &axi_qos->qosconf);
383 writel(0x00002053, &axi_qos->qosctset0);
384 writel(0x00000001, &axi_qos->qosreqctr);
385 writel(0x00002064, &axi_qos->qosthres0);
386 writel(0x00002004, &axi_qos->qosthres1);
387 writel(0x00000000, &axi_qos->qosthres2);
388 writel(0x00000001, &axi_qos->qosqon);
389
390 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
391 writel(0x00000002, &axi_qos->qosconf);
392 writel(0x00002245, &axi_qos->qosctset0);
393 writel(0x00000001, &axi_qos->qosreqctr);
394 writel(0x00002064, &axi_qos->qosthres0);
395 writel(0x00002004, &axi_qos->qosthres1);
396 writel(0x00000000, &axi_qos->qosthres2);
397 writel(0x00000001, &axi_qos->qosqon);
398
399 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
400 writel(0x00000000, &axi_qos->qosconf);
401 writel(0x00002029, &axi_qos->qosctset0);
402 writel(0x00000001, &axi_qos->qosreqctr);
403 writel(0x00002064, &axi_qos->qosthres0);
404 writel(0x00002004, &axi_qos->qosthres1);
405 writel(0x00000000, &axi_qos->qosthres2);
406 writel(0x00000001, &axi_qos->qosqon);
407
408 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
409 writel(0x00000002, &axi_qos->qosconf);
410 writel(0x00002245, &axi_qos->qosctset0);
411 writel(0x00000001, &axi_qos->qosreqctr);
412 writel(0x00002064, &axi_qos->qosthres0);
413 writel(0x00002004, &axi_qos->qosthres1);
414 writel(0x00000000, &axi_qos->qosthres2);
415 writel(0x00000001, &axi_qos->qosqon);
416
417 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
418 writel(0x00000000, &axi_qos->qosconf);
419 writel(0x00002053, &axi_qos->qosctset0);
420 writel(0x00000001, &axi_qos->qosreqctr);
421 writel(0x00002064, &axi_qos->qosthres0);
422 writel(0x00002004, &axi_qos->qosthres1);
423 writel(0x00000000, &axi_qos->qosthres2);
424 writel(0x00000001, &axi_qos->qosqon);
425
426 axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
427 writel(0x00000000, &axi_qos->qosconf);
428 writel(0x000020A6, &axi_qos->qosctset0);
429 writel(0x00000001, &axi_qos->qosreqctr);
430 writel(0x00002064, &axi_qos->qosthres0);
431 writel(0x00002004, &axi_qos->qosthres1);
432 writel(0x00000000, &axi_qos->qosthres2);
433 writel(0x00000001, &axi_qos->qosqon);
434
435 axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
436 writel(0x00000000, &axi_qos->qosconf);
437 writel(0x00002053, &axi_qos->qosctset0);
438 writel(0x00000001, &axi_qos->qosreqctr);
439 writel(0x00002064, &axi_qos->qosthres0);
440 writel(0x00002004, &axi_qos->qosthres1);
441 writel(0x00000000, &axi_qos->qosthres2);
442 writel(0x00000001, &axi_qos->qosqon);
443
444 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
445 writel(0x00000002, &axi_qos->qosconf);
446 writel(0x00002245, &axi_qos->qosctset0);
447 writel(0x00000001, &axi_qos->qosreqctr);
448 writel(0x00002064, &axi_qos->qosthres0);
449 writel(0x00002004, &axi_qos->qosthres1);
450 writel(0x00000000, &axi_qos->qosthres2);
451 writel(0x00000001, &axi_qos->qosqon);
452
453 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
454 writel(0x00000000, &axi_qos->qosconf);
455 writel(0x0000214C, &axi_qos->qosctset0);
456 writel(0x00000001, &axi_qos->qosreqctr);
457 writel(0x00002064, &axi_qos->qosthres0);
458 writel(0x00002004, &axi_qos->qosthres1);
459 writel(0x00000000, &axi_qos->qosthres2);
460 writel(0x00000001, &axi_qos->qosqon);
461
462 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
463 writel(0x00000000, &axi_qos->qosconf);
464 writel(0x0000214C, &axi_qos->qosctset0);
465 writel(0x00000001, &axi_qos->qosreqctr);
466 writel(0x00002064, &axi_qos->qosthres0);
467 writel(0x00002004, &axi_qos->qosthres1);
468 writel(0x00000000, &axi_qos->qosthres2);
469 writel(0x00000001, &axi_qos->qosqon);
470
471 axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
472 writel(0x00000000, &axi_qos->qosconf);
473 writel(0x000020A6, &axi_qos->qosctset0);
474 writel(0x00000001, &axi_qos->qosreqctr);
475 writel(0x00002064, &axi_qos->qosthres0);
476 writel(0x00002004, &axi_qos->qosthres1);
477 writel(0x00000000, &axi_qos->qosthres2);
478 writel(0x00000001, &axi_qos->qosqon);
479
480 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
481 writel(0x00000000, &axi_qos->qosconf);
482 writel(0x00002053, &axi_qos->qosctset0);
483 writel(0x00000001, &axi_qos->qosreqctr);
484 writel(0x00002064, &axi_qos->qosthres0);
485 writel(0x00002004, &axi_qos->qosthres1);
486 writel(0x00000000, &axi_qos->qosthres2);
487 writel(0x00000001, &axi_qos->qosqon);
488
489 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
490 writel(0x00000000, &axi_qos->qosconf);
491 writel(0x00002053, &axi_qos->qosctset0);
492 writel(0x00000001, &axi_qos->qosreqctr);
493 writel(0x00002064, &axi_qos->qosthres0);
494 writel(0x00002004, &axi_qos->qosthres1);
495 writel(0x00000000, &axi_qos->qosthres2);
496 writel(0x00000001, &axi_qos->qosqon);
497
498 /* QoS Register (RT-AXI) */
499 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]500 writel(0x00000001, &axi_qos->qosconf);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]501 writel(0x00002053, &axi_qos->qosctset0);
502 writel(0x00002096, &axi_qos->qosctset1);
503 writel(0x00002030, &axi_qos->qosctset2);
504 writel(0x00002030, &axi_qos->qosctset3);
505 writel(0x00000001, &axi_qos->qosreqctr);
506 writel(0x00002064, &axi_qos->qosthres0);
507 writel(0x00002004, &axi_qos->qosthres1);
508 writel(0x00000000, &axi_qos->qosthres2);
509 writel(0x00000001, &axi_qos->qosqon);
510
511 axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
512 writel(0x00000000, &axi_qos->qosconf);
513 writel(0x00002053, &axi_qos->qosctset0);
514 writel(0x00002096, &axi_qos->qosctset1);
515 writel(0x00002030, &axi_qos->qosctset2);
516 writel(0x00002030, &axi_qos->qosctset3);
517 writel(0x00000001, &axi_qos->qosreqctr);
518 writel(0x00002064, &axi_qos->qosthres0);
519 writel(0x00002004, &axi_qos->qosthres1);
520 writel(0x00000000, &axi_qos->qosthres2);
521 writel(0x00000001, &axi_qos->qosqon);
522
523 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
524 writel(0x00000002, &axi_qos->qosconf);
525 writel(0x00002245, &axi_qos->qosctset0);
526 writel(0x00002096, &axi_qos->qosctset1);
527 writel(0x00002030, &axi_qos->qosctset2);
528 writel(0x00002030, &axi_qos->qosctset3);
529 writel(0x00000001, &axi_qos->qosreqctr);
530 writel(0x00002064, &axi_qos->qosthres0);
531 writel(0x00002004, &axi_qos->qosthres1);
532 writel(0x00000000, &axi_qos->qosthres2);
533 writel(0x00000001, &axi_qos->qosqon);
534
535 axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
536 writel(0x00000002, &axi_qos->qosconf);
537 writel(0x00002245, &axi_qos->qosctset0);
538 writel(0x00000001, &axi_qos->qosreqctr);
539 writel(0x00002064, &axi_qos->qosthres0);
540 writel(0x00002004, &axi_qos->qosthres1);
541 writel(0x00000000, &axi_qos->qosthres2);
542 writel(0x00000001, &axi_qos->qosqon);
543
544 /* QoS Register (MP-AXI) */
545 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
546 writel(0x00000000, &axi_qos->qosconf);
547 writel(0x00002037, &axi_qos->qosctset0);
548 writel(0x00000001, &axi_qos->qosreqctr);
549 writel(0x00002064, &axi_qos->qosthres0);
550 writel(0x00002004, &axi_qos->qosthres1);
551 writel(0x00000000, &axi_qos->qosthres2);
552 writel(0x00000001, &axi_qos->qosqon);
553
554 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
555 writel(0x00000001, &axi_qos->qosconf);
556 writel(0x00002014, &axi_qos->qosctset0);
557 writel(0x00000040, &axi_qos->qosreqctr);
558 writel(0x00002064, &axi_qos->qosthres0);
559 writel(0x00002004, &axi_qos->qosthres1);
560 writel(0x00000000, &axi_qos->qosthres2);
561 writel(0x00000001, &axi_qos->qosqon);
562
563 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
564 writel(0x00000001, &axi_qos->qosconf);
565 writel(0x00002014, &axi_qos->qosctset0);
566 writel(0x00000040, &axi_qos->qosreqctr);
567 writel(0x00002064, &axi_qos->qosthres0);
568 writel(0x00002004, &axi_qos->qosthres1);
569 writel(0x00000000, &axi_qos->qosthres2);
570 writel(0x00000001, &axi_qos->qosqon);
571
572 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
573 writel(0x00000001, &axi_qos->qosconf);
574 writel(0x00001FF0, &axi_qos->qosctset0);
575 writel(0x00000020, &axi_qos->qosreqctr);
576 writel(0x00002064, &axi_qos->qosthres0);
577 writel(0x00002004, &axi_qos->qosthres1);
578 writel(0x00002001, &axi_qos->qosthres2);
579 writel(0x00000001, &axi_qos->qosqon);
580
581 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
582 writel(0x00000001, &axi_qos->qosconf);
583 writel(0x00002004, &axi_qos->qosctset0);
584 writel(0x00002096, &axi_qos->qosctset1);
585 writel(0x00002030, &axi_qos->qosctset2);
586 writel(0x00002030, &axi_qos->qosctset3);
587 writel(0x00000001, &axi_qos->qosreqctr);
588 writel(0x00002064, &axi_qos->qosthres0);
589 writel(0x00002004, &axi_qos->qosthres1);
590 writel(0x00000000, &axi_qos->qosthres2);
591 writel(0x00000001, &axi_qos->qosqon);
592
593 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
594 writel(0x00000000, &axi_qos->qosconf);
595 writel(0x00002053, &axi_qos->qosctset0);
596 writel(0x00000001, &axi_qos->qosreqctr);
597 writel(0x00002064, &axi_qos->qosthres0);
598 writel(0x00002004, &axi_qos->qosthres1);
599 writel(0x00000000, &axi_qos->qosthres2);
600 writel(0x00000001, &axi_qos->qosqon);
601
602 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
603 writel(0x00000000, &axi_qos->qosconf);
604 writel(0x0000206E, &axi_qos->qosctset0);
605 writel(0x00000001, &axi_qos->qosreqctr);
606 writel(0x00002064, &axi_qos->qosthres0);
607 writel(0x00002004, &axi_qos->qosthres1);
608 writel(0x00000000, &axi_qos->qosthres2);
609 writel(0x00000001, &axi_qos->qosqon);
610
611 /* QoS Register (SYS-AXI256) */
612 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
613 writel(0x00000002, &axi_qos->qosconf);
614 writel(0x000020EB, &axi_qos->qosctset0);
615 writel(0x00002096, &axi_qos->qosctset1);
616 writel(0x00002030, &axi_qos->qosctset2);
617 writel(0x00002030, &axi_qos->qosctset3);
618 writel(0x00000001, &axi_qos->qosreqctr);
619 writel(0x00002064, &axi_qos->qosthres0);
620 writel(0x00002004, &axi_qos->qosthres1);
621 writel(0x00000000, &axi_qos->qosthres2);
622 writel(0x00000001, &axi_qos->qosqon);
623
624 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
625 writel(0x00000002, &axi_qos->qosconf);
626 writel(0x000020EB, &axi_qos->qosctset0);
627 writel(0x00002096, &axi_qos->qosctset1);
628 writel(0x00002030, &axi_qos->qosctset2);
629 writel(0x00002030, &axi_qos->qosctset3);
630 writel(0x00000001, &axi_qos->qosreqctr);
631 writel(0x00002064, &axi_qos->qosthres0);
632 writel(0x00002004, &axi_qos->qosthres1);
633 writel(0x00000000, &axi_qos->qosthres2);
634 writel(0x00000001, &axi_qos->qosqon);
635
636 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
637 writel(0x00000002, &axi_qos->qosconf);
638 writel(0x000020EB, &axi_qos->qosctset0);
639 writel(0x00002096, &axi_qos->qosctset1);
640 writel(0x00002030, &axi_qos->qosctset2);
641 writel(0x00002030, &axi_qos->qosctset3);
642 writel(0x00000001, &axi_qos->qosreqctr);
643 writel(0x00002064, &axi_qos->qosthres0);
644 writel(0x00002004, &axi_qos->qosthres1);
645 writel(0x00000000, &axi_qos->qosthres2);
646 writel(0x00000001, &axi_qos->qosqon);
647
648 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
649 writel(0x00000002, &axi_qos->qosconf);
650 writel(0x000020EB, &axi_qos->qosctset0);
651 writel(0x00002096, &axi_qos->qosctset1);
652 writel(0x00002030, &axi_qos->qosctset2);
653 writel(0x00002030, &axi_qos->qosctset3);
654 writel(0x00000001, &axi_qos->qosreqctr);
655 writel(0x00002064, &axi_qos->qosthres0);
656 writel(0x00002004, &axi_qos->qosthres1);
657 writel(0x00000000, &axi_qos->qosthres2);
658 writel(0x00000001, &axi_qos->qosqon);
659
660 /* QoS Register (CCI-AXI) */
661 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
662 writel(0x00000001, &axi_qos->qosconf);
663 writel(0x00002004, &axi_qos->qosctset0);
664 writel(0x00002096, &axi_qos->qosctset1);
665 writel(0x00002030, &axi_qos->qosctset2);
666 writel(0x00002030, &axi_qos->qosctset3);
667 writel(0x00000001, &axi_qos->qosreqctr);
668 writel(0x00002064, &axi_qos->qosthres0);
669 writel(0x00002004, &axi_qos->qosthres1);
670 writel(0x00000000, &axi_qos->qosthres2);
671 writel(0x00000001, &axi_qos->qosqon);
672
673 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
674 writel(0x00000002, &axi_qos->qosconf);
675 writel(0x00002245, &axi_qos->qosctset0);
676 writel(0x00002096, &axi_qos->qosctset1);
677 writel(0x00002030, &axi_qos->qosctset2);
678 writel(0x00002030, &axi_qos->qosctset3);
679 writel(0x00000001, &axi_qos->qosreqctr);
680 writel(0x00002064, &axi_qos->qosthres0);
681 writel(0x00002004, &axi_qos->qosthres1);
682 writel(0x00000000, &axi_qos->qosthres2);
683 writel(0x00000001, &axi_qos->qosqon);
684
685 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
686 writel(0x00000001, &axi_qos->qosconf);
687 writel(0x00002004, &axi_qos->qosctset0);
688 writel(0x00002096, &axi_qos->qosctset1);
689 writel(0x00002030, &axi_qos->qosctset2);
690 writel(0x00002030, &axi_qos->qosctset3);
691 writel(0x00000001, &axi_qos->qosreqctr);
692 writel(0x00002064, &axi_qos->qosthres0);
693 writel(0x00002004, &axi_qos->qosthres1);
694 writel(0x00000000, &axi_qos->qosthres2);
695 writel(0x00000001, &axi_qos->qosqon);
696
697 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
698 writel(0x00000001, &axi_qos->qosconf);
699 writel(0x00002004, &axi_qos->qosctset0);
700 writel(0x00002096, &axi_qos->qosctset1);
701 writel(0x00002030, &axi_qos->qosctset2);
702 writel(0x00002030, &axi_qos->qosctset3);
703 writel(0x00000001, &axi_qos->qosreqctr);
704 writel(0x00002064, &axi_qos->qosthres0);
705 writel(0x00002004, &axi_qos->qosthres1);
706 writel(0x00000000, &axi_qos->qosthres2);
707 writel(0x00000001, &axi_qos->qosqon);
708
709 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
710 writel(0x00000001, &axi_qos->qosconf);
711 writel(0x00002004, &axi_qos->qosctset0);
712 writel(0x00002096, &axi_qos->qosctset1);
713 writel(0x00002030, &axi_qos->qosctset2);
714 writel(0x00002030, &axi_qos->qosctset3);
715 writel(0x00000001, &axi_qos->qosreqctr);
716 writel(0x00002064, &axi_qos->qosthres0);
717 writel(0x00002004, &axi_qos->qosthres1);
718 writel(0x00000000, &axi_qos->qosthres2);
719 writel(0x00000001, &axi_qos->qosqon);
720
721 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
722 writel(0x00000002, &axi_qos->qosconf);
723 writel(0x00002245, &axi_qos->qosctset0);
724 writel(0x00002096, &axi_qos->qosctset1);
725 writel(0x00002030, &axi_qos->qosctset2);
726 writel(0x00002030, &axi_qos->qosctset3);
727 writel(0x00000001, &axi_qos->qosreqctr);
728 writel(0x00002064, &axi_qos->qosthres0);
729 writel(0x00002004, &axi_qos->qosthres1);
730 writel(0x00000000, &axi_qos->qosthres2);
731 writel(0x00000001, &axi_qos->qosqon);
732
733 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
734 writel(0x00000001, &axi_qos->qosconf);
735 writel(0x00002004, &axi_qos->qosctset0);
736 writel(0x00002096, &axi_qos->qosctset1);
737 writel(0x00002030, &axi_qos->qosctset2);
738 writel(0x00002030, &axi_qos->qosctset3);
739 writel(0x00000001, &axi_qos->qosreqctr);
740 writel(0x00002064, &axi_qos->qosthres0);
741 writel(0x00002004, &axi_qos->qosthres1);
742 writel(0x00000000, &axi_qos->qosthres2);
743 writel(0x00000001, &axi_qos->qosqon);
744
745 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
746 writel(0x00000001, &axi_qos->qosconf);
747 writel(0x00002004, &axi_qos->qosctset0);
748 writel(0x00002096, &axi_qos->qosctset1);
749 writel(0x00002030, &axi_qos->qosctset2);
750 writel(0x00002030, &axi_qos->qosctset3);
751 writel(0x00000001, &axi_qos->qosreqctr);
752 writel(0x00002064, &axi_qos->qosthres0);
753 writel(0x00002004, &axi_qos->qosthres1);
754 writel(0x00000000, &axi_qos->qosthres2);
755 writel(0x00000001, &axi_qos->qosqon);
756
757 /* QoS Register (Media-AXI) */
758 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
759 writel(0x00000002, &axi_qos->qosconf);
760 writel(0x000020DC, &axi_qos->qosctset0);
761 writel(0x00002096, &axi_qos->qosctset1);
762 writel(0x00002030, &axi_qos->qosctset2);
763 writel(0x00002030, &axi_qos->qosctset3);
764 writel(0x00000020, &axi_qos->qosreqctr);
765 writel(0x000020AA, &axi_qos->qosthres0);
766 writel(0x00002032, &axi_qos->qosthres1);
767 writel(0x00000001, &axi_qos->qosthres2);
768
769 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
770 writel(0x00000002, &axi_qos->qosconf);
771 writel(0x000020DC, &axi_qos->qosctset0);
772 writel(0x00002096, &axi_qos->qosctset1);
773 writel(0x00002030, &axi_qos->qosctset2);
774 writel(0x00002030, &axi_qos->qosctset3);
775 writel(0x00000020, &axi_qos->qosreqctr);
776 writel(0x000020AA, &axi_qos->qosthres0);
777 writel(0x00002032, &axi_qos->qosthres1);
778 writel(0x00000001, &axi_qos->qosthres2);
779
780 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
781 writel(0x00000001, &axi_qos->qosconf);
782 writel(0x00002190, &axi_qos->qosctset0);
783 writel(0x00000020, &axi_qos->qosreqctr);
784 writel(0x00002064, &axi_qos->qosthres0);
785 writel(0x00002004, &axi_qos->qosthres1);
786 writel(0x00000001, &axi_qos->qosthres2);
787 writel(0x00000001, &axi_qos->qosqon);
788
789 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
790 writel(0x00000001, &axi_qos->qosconf);
791 writel(0x00002190, &axi_qos->qosctset0);
792 writel(0x00000020, &axi_qos->qosreqctr);
793 writel(0x00000001, &axi_qos->qosthres0);
794 writel(0x00000001, &axi_qos->qosthres1);
795 writel(0x00000001, &axi_qos->qosthres2);
796 writel(0x00000001, &axi_qos->qosqon);
797
798 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
799 writel(0x00000001, &axi_qos->qosconf);
800 writel(0x00002190, &axi_qos->qosctset0);
801 writel(0x00000020, &axi_qos->qosreqctr);
802 writel(0x00002064, &axi_qos->qosthres0);
803 writel(0x00002004, &axi_qos->qosthres1);
804 writel(0x00000001, &axi_qos->qosthres2);
805 writel(0x00000001, &axi_qos->qosqon);
806
807 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
808 writel(0x00000001, &axi_qos->qosconf);
809 writel(0x00002190, &axi_qos->qosctset0);
810 writel(0x00000020, &axi_qos->qosreqctr);
811 writel(0x00000001, &axi_qos->qosthres0);
812 writel(0x00000001, &axi_qos->qosthres1);
813 writel(0x00000001, &axi_qos->qosthres2);
814 writel(0x00000001, &axi_qos->qosqon);
815
816 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
817 writel(0x00000001, &axi_qos->qosconf);
818 writel(0x00002190, &axi_qos->qosctset0);
819 writel(0x00000020, &axi_qos->qosreqctr);
820 writel(0x00002064, &axi_qos->qosthres0);
821 writel(0x00002004, &axi_qos->qosthres1);
822 writel(0x00000001, &axi_qos->qosthres2);
823 writel(0x00000001, &axi_qos->qosqon);
824
825 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
826 writel(0x00000001, &axi_qos->qosconf);
827 writel(0x00002190, &axi_qos->qosctset0);
828 writel(0x00000020, &axi_qos->qosreqctr);
829 writel(0x00000001, &axi_qos->qosthres0);
830 writel(0x00000001, &axi_qos->qosthres1);
831 writel(0x00000001, &axi_qos->qosthres2);
832 writel(0x00000001, &axi_qos->qosqon);
833
834 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
835 writel(0x00000001, &axi_qos->qosconf);
836 writel(0x00001FF0, &axi_qos->qosctset0);
837 writel(0x00000020, &axi_qos->qosreqctr);
838 writel(0x00002064, &axi_qos->qosthres0);
839 writel(0x00002004, &axi_qos->qosthres1);
840 writel(0x00002001, &axi_qos->qosthres2);
841 writel(0x00000001, &axi_qos->qosqon);
842
843 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
844 writel(0x00000001, &axi_qos->qosconf);
845 writel(0x000020C8, &axi_qos->qosctset0);
846 writel(0x00000020, &axi_qos->qosreqctr);
847 writel(0x00002064, &axi_qos->qosthres0);
848 writel(0x00002004, &axi_qos->qosthres1);
849 writel(0x00000001, &axi_qos->qosthres2);
850 writel(0x00000001, &axi_qos->qosqon);
851
852 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
853 writel(0x00000001, &axi_qos->qosconf);
854 writel(0x000020C8, &axi_qos->qosctset0);
855 writel(0x00000020, &axi_qos->qosreqctr);
856 writel(0x00000001, &axi_qos->qosthres0);
857 writel(0x00000001, &axi_qos->qosthres1);
858 writel(0x00000001, &axi_qos->qosthres2);
859 writel(0x00000001, &axi_qos->qosqon);
860
861 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
862 writel(0x00000001, &axi_qos->qosconf);
863 writel(0x000020C8, &axi_qos->qosctset0);
864 writel(0x00000020, &axi_qos->qosreqctr);
865 writel(0x00002064, &axi_qos->qosthres0);
866 writel(0x00002004, &axi_qos->qosthres1);
867 writel(0x00000001, &axi_qos->qosthres2);
868 writel(0x00000001, &axi_qos->qosqon);
869
870 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
871 writel(0x00000001, &axi_qos->qosconf);
872 writel(0x000020C8, &axi_qos->qosctset0);
873 writel(0x00000020, &axi_qos->qosreqctr);
874 writel(0x00002064, &axi_qos->qosthres0);
875 writel(0x00002004, &axi_qos->qosthres1);
876 writel(0x00000001, &axi_qos->qosthres2);
877 writel(0x00000001, &axi_qos->qosqon);
878
879 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
880 writel(0x00000001, &axi_qos->qosconf);
881 writel(0x000020C8, &axi_qos->qosctset0);
882 writel(0x00000020, &axi_qos->qosreqctr);
883 writel(0x00002064, &axi_qos->qosthres0);
884 writel(0x00002004, &axi_qos->qosthres1);
885 writel(0x00000001, &axi_qos->qosthres2);
886 writel(0x00000001, &axi_qos->qosqon);
887
888 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
889 writel(0x00000001, &axi_qos->qosconf);
890 writel(0x000020C8, &axi_qos->qosctset0);
891 writel(0x00000020, &axi_qos->qosreqctr);
892 writel(0x00000001, &axi_qos->qosthres0);
893 writel(0x00000001, &axi_qos->qosthres1);
894 writel(0x00000001, &axi_qos->qosthres2);
895 writel(0x00000001, &axi_qos->qosqon);
896
897 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
898 writel(0x00000001, &axi_qos->qosconf);
899 writel(0x000020C8, &axi_qos->qosctset0);
900 writel(0x00000020, &axi_qos->qosreqctr);
901 writel(0x00002064, &axi_qos->qosthres0);
902 writel(0x00002004, &axi_qos->qosthres1);
903 writel(0x00000001, &axi_qos->qosthres2);
904 writel(0x00000001, &axi_qos->qosqon);
905
906 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
907 writel(0x00000001, &axi_qos->qosconf);
908 writel(0x000020C8, &axi_qos->qosctset0);
909 writel(0x00000020, &axi_qos->qosreqctr);
910 writel(0x00002064, &axi_qos->qosthres0);
911 writel(0x00002004, &axi_qos->qosthres1);
912 writel(0x00000001, &axi_qos->qosthres2);
913 writel(0x00000001, &axi_qos->qosqon);
914
915 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
916 writel(0x00000003, &axi_qos->qosconf);
917 writel(0x000020C8, &axi_qos->qosctset0);
918 writel(0x00002064, &axi_qos->qosthres0);
919 writel(0x00002004, &axi_qos->qosthres1);
920 writel(0x00000001, &axi_qos->qosthres2);
921 writel(0x00000001, &axi_qos->qosqon);
922
923 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
924 writel(0x00000003, &axi_qos->qosconf);
925 writel(0x000020C8, &axi_qos->qosctset0);
926 writel(0x00002064, &axi_qos->qosthres0);
927 writel(0x00002004, &axi_qos->qosthres1);
928 writel(0x00000001, &axi_qos->qosthres2);
929 writel(0x00000001, &axi_qos->qosqon);
930
931 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
932 writel(0x00000003, &axi_qos->qosconf);
933 writel(0x00002063, &axi_qos->qosctset0);
934 writel(0x00000001, &axi_qos->qosreqctr);
935 writel(0x00002064, &axi_qos->qosthres0);
936 writel(0x00002004, &axi_qos->qosthres1);
937 writel(0x00000001, &axi_qos->qosthres2);
938 writel(0x00000001, &axi_qos->qosqon);
939
940 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
941 writel(0x00000003, &axi_qos->qosconf);
942 writel(0x00002063, &axi_qos->qosctset0);
943 writel(0x00000001, &axi_qos->qosreqctr);
944 writel(0x00002064, &axi_qos->qosthres0);
945 writel(0x00002004, &axi_qos->qosthres1);
946 writel(0x00000001, &axi_qos->qosthres2);
947 writel(0x00000001, &axi_qos->qosqon);
948
949 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
950 writel(0x00000001, &axi_qos->qosconf);
951 writel(0x00002073, &axi_qos->qosctset0);
952 writel(0x00000020, &axi_qos->qosreqctr);
953 writel(0x00002064, &axi_qos->qosthres0);
954 writel(0x00002004, &axi_qos->qosthres1);
955 writel(0x00000001, &axi_qos->qosthres2);
956 writel(0x00000001, &axi_qos->qosqon);
957
958 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
959 writel(0x00000001, &axi_qos->qosconf);
960 writel(0x00002073, &axi_qos->qosctset0);
961 writel(0x00000020, &axi_qos->qosreqctr);
962 writel(0x00000001, &axi_qos->qosthres0);
963 writel(0x00000001, &axi_qos->qosthres1);
964 writel(0x00000001, &axi_qos->qosthres2);
965 writel(0x00000001, &axi_qos->qosqon);
966
967 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
968 writel(0x00000001, &axi_qos->qosconf);
969 writel(0x00002073, &axi_qos->qosctset0);
970 writel(0x00000020, &axi_qos->qosreqctr);
971 writel(0x00002064, &axi_qos->qosthres0);
972 writel(0x00002004, &axi_qos->qosthres1);
973 writel(0x00000001, &axi_qos->qosthres2);
974 writel(0x00000001, &axi_qos->qosqon);
975
976 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
977 writel(0x00000001, &axi_qos->qosconf);
978 writel(0x00002073, &axi_qos->qosctset0);
979 writel(0x00000020, &axi_qos->qosreqctr);
980 writel(0x00000001, &axi_qos->qosthres0);
981 writel(0x00000001, &axi_qos->qosthres1);
982 writel(0x00000001, &axi_qos->qosthres2);
983 writel(0x00000001, &axi_qos->qosqon);
984
985 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
986 writel(0x00000001, &axi_qos->qosconf);
987 writel(0x00002073, &axi_qos->qosctset0);
988 writel(0x00000020, &axi_qos->qosreqctr);
989 writel(0x00002064, &axi_qos->qosthres0);
990 writel(0x00002004, &axi_qos->qosthres1);
991 writel(0x00000001, &axi_qos->qosthres2);
992 writel(0x00000001, &axi_qos->qosqon);
993}
Marek Vasutd26aa8c2024-02-27 17:05:53 +0100[diff] [blame]994#else /* CONFIG_RENESAS_EXTRAM_BOOT */
Nobuhiro Iwamatsua341e772014-10-31 16:16:28 +0900[diff] [blame]995void qos_init(void)
996{
997}
Marek Vasutd26aa8c2024-02-27 17:05:53 +0100[diff] [blame]998#endif /* CONFIG_RENESAS_EXTRAM_BOOT */