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git01.mediatek.com / filogic / uboot / 10e4779db8ae6c2784392fa7a1f690645918662d / . / board / renesas / alt / qos.c
blob: 2f657505ceb168e768db42bb02c6ba0e592624a8 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]2/*
3 * board/renesas/alt/qos.c
4 *
5 * Copyright (C) 2014 Renesas Electronics Corporation
6 *
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]7 */
8
9#include <common.h>
10#include <asm/processor.h>
11#include <asm/mach-types.h>
12#include <asm/io.h>
13#include <asm/arch/rmobile.h>
14
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +0900[diff] [blame]15#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]16/* QoS version 0.311 for ES1 and version 0.321 for ES2 */
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]17
18enum {
19 DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
20 DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
21 DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
22 DBSC3_15,
23 DBSC3_NR,
24};
25
26static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
27 [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
28 [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
29 [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
30 [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
31 [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
32 [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
33 [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
34 [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
35 [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
36 [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
37 [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
38 [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
39 [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
40 [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
41 [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
42 [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
43};
44
45static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
46 [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
47 [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
48 [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
49 [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
50 [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
51 [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
52 [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
53 [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
54 [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
55 [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
56 [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
57 [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
58 [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
59 [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
60 [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
61 [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
62};
63
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]64#if defined(CONFIG_QOS_PRI_MEDIA)
65#define is_qos_pri_media() 1
66#else
67#define is_qos_pri_media() 0
68#endif
69
70#if defined(CONFIG_QOS_PRI_NORMAL)
71#define is_qos_pri_normal() 1
72#else
73#define is_qos_pri_normal() 0
74#endif
75
76#if defined(CONFIG_QOS_PRI_GFX)
77#define is_qos_pri_gfx() 1
78#else
79#define is_qos_pri_gfx() 0
80#endif
81
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]82void qos_init(void)
83{
84 int i;
85 struct rcar_s3c *s3c;
86 struct rcar_s3c_qos *s3c_qos;
87 struct rcar_dbsc3_qos *qos_addr;
88 struct rcar_mxi *mxi;
89 struct rcar_mxi_qos *mxi_qos;
90 struct rcar_axi_qos *axi_qos;
91
92 /* DBSC DBADJ2 */
93 writel(0x20042004, DBSC3_0_DBADJ2);
94
95 /* S3C -QoS */
96 s3c = (struct rcar_s3c *)S3C_BASE;
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]97 if (is_qos_pri_media()) {
98 writel(0x1F0B0604, &s3c->s3crorr);
99 writel(0x1F0E0705, &s3c->s3cworr);
100 } else if (is_qos_pri_normal()) {
101 writel(0x1F0B0908, &s3c->s3crorr);
102 writel(0x1F0E0A08, &s3c->s3cworr);
103 } else if (is_qos_pri_media()) {
104 writel(0x1F0B0B0B, &s3c->s3crorr);
105 writel(0x1F0E0C0C, &s3c->s3cworr);
106 }
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]107 /* QoS Control Registers */
108 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
109 writel(0x00890089, &s3c_qos->s3cqos0);
110 writel(0x20960010, &s3c_qos->s3cqos1);
111 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]112 if (is_qos_pri_media())
113 writel(0x20AA2300, &s3c_qos->s3cqos3);
114 else if (is_qos_pri_normal())
115 writel(0x20AA2200, &s3c_qos->s3cqos3);
116 else if (is_qos_pri_media())
117 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]118 writel(0x00002032, &s3c_qos->s3cqos4);
119 writel(0x20960010, &s3c_qos->s3cqos5);
120 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]121 if (is_qos_pri_media())
122 writel(0x20AA2300, &s3c_qos->s3cqos7);
123 else if (is_qos_pri_normal())
124 writel(0x20AA2200, &s3c_qos->s3cqos7);
125 else if (is_qos_pri_gfx())
126 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]127 writel(0x00002032, &s3c_qos->s3cqos8);
128
129 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
130 writel(0x00890089, &s3c_qos->s3cqos0);
131 writel(0x20960010, &s3c_qos->s3cqos1);
132 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]133 if (is_qos_pri_media())
134 writel(0x20AA2300, &s3c_qos->s3cqos3);
135 else if (is_qos_pri_normal())
136 writel(0x20AA2200, &s3c_qos->s3cqos3);
137 else if (is_qos_pri_gfx())
138 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]139 writel(0x00002032, &s3c_qos->s3cqos4);
140 writel(0x20960010, &s3c_qos->s3cqos5);
141 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]142 if (is_qos_pri_media())
143 writel(0x20AA2300, &s3c_qos->s3cqos7);
144 else if (is_qos_pri_media())
145 writel(0x20AA2200, &s3c_qos->s3cqos7);
146 else if (is_qos_pri_media())
147 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]148 writel(0x00002032, &s3c_qos->s3cqos8);
149
150 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
151 writel(0x80928092, &s3c_qos->s3cqos0);
152 writel(0x20960020, &s3c_qos->s3cqos1);
153 writel(0x20302030, &s3c_qos->s3cqos2);
154 writel(0x20AA20DC, &s3c_qos->s3cqos3);
155 writel(0x00002032, &s3c_qos->s3cqos4);
156 writel(0x20960020, &s3c_qos->s3cqos5);
157 writel(0x20302030, &s3c_qos->s3cqos6);
158 writel(0x20AA20DC, &s3c_qos->s3cqos7);
159 writel(0x00002032, &s3c_qos->s3cqos8);
160
161 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]162 writel(0x00820092, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]163 writel(0x20960020, &s3c_qos->s3cqos1);
164 writel(0x20302030, &s3c_qos->s3cqos2);
165 writel(0x20AA20FA, &s3c_qos->s3cqos3);
166 writel(0x00002032, &s3c_qos->s3cqos4);
167 writel(0x20960020, &s3c_qos->s3cqos5);
168 writel(0x20302030, &s3c_qos->s3cqos6);
169 writel(0x20AA20FA, &s3c_qos->s3cqos7);
170 writel(0x00002032, &s3c_qos->s3cqos8);
171
172 /* DBSC -QoS */
173 /* DBSC0 - Read */
174 for (i = DBSC3_00; i < DBSC3_NR; i++) {
175 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
176 writel(0x00000002, &qos_addr->dblgcnt);
177 writel(0x0000207D, &qos_addr->dbtmval0);
178 writel(0x00002053, &qos_addr->dbtmval1);
179 writel(0x0000202A, &qos_addr->dbtmval2);
180 writel(0x00001FBD, &qos_addr->dbtmval3);
181 writel(0x00000001, &qos_addr->dbrqctr);
182 writel(0x00002064, &qos_addr->dbthres0);
183 writel(0x0000203E, &qos_addr->dbthres1);
184 writel(0x00002019, &qos_addr->dbthres2);
185 writel(0x00000001, &qos_addr->dblgqon);
186 }
187
188 /* DBSC0 - Write */
189 for (i = DBSC3_00; i < DBSC3_NR; i++) {
190 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
191 writel(0x00000002, &qos_addr->dblgcnt);
192 writel(0x0000207D, &qos_addr->dbtmval0);
193 writel(0x00002053, &qos_addr->dbtmval1);
194 writel(0x00002043, &qos_addr->dbtmval2);
195 writel(0x00002030, &qos_addr->dbtmval3);
196 writel(0x00000001, &qos_addr->dbrqctr);
197 writel(0x00002064, &qos_addr->dbthres0);
198 writel(0x0000203E, &qos_addr->dbthres1);
199 writel(0x00002031, &qos_addr->dbthres2);
200 writel(0x00000001, &qos_addr->dblgqon);
201 }
202
203 /* CCI-400 -QoS */
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]204 if (IS_R8A7794_ES2()) {
205 writel(0x20001000, CCI_400_MAXOT_1);
206 writel(0x20001000, CCI_400_MAXOT_2);
207 } else {
208 writel(0x20000800, CCI_400_MAXOT_1);
209 writel(0x20000800, CCI_400_MAXOT_2);
210 }
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]211 writel(0x0000000C, CCI_400_QOSCNTL_1);
212 writel(0x0000000C, CCI_400_QOSCNTL_2);
213
214 /* MXI -QoS */
215 /* Transaction Control (MXI) */
216 mxi = (struct rcar_mxi *)MXI_BASE;
217 writel(0x00000013, &mxi->mxrtcr);
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]218 writel(0x00000016, &mxi->mxwtcr);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]219 writel(0x00780080, &mxi->mxsaar0);
220 writel(0x02000800, &mxi->mxsaar1);
221
222 /* QoS Control (MXI) */
223 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
224 writel(0x0000000C, &mxi_qos->vspdu0);
225 writel(0x0000000E, &mxi_qos->du0);
226
227 /* AXI -QoS */
228 /* Transaction Control (MXI) */
229 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
230 writel(0x00000002, &axi_qos->qosconf);
231 writel(0x00002245, &axi_qos->qosctset0);
232 writel(0x00002096, &axi_qos->qosctset1);
233 writel(0x00002030, &axi_qos->qosctset2);
234 writel(0x00002030, &axi_qos->qosctset3);
235 writel(0x00000001, &axi_qos->qosreqctr);
236 writel(0x00002064, &axi_qos->qosthres0);
237 writel(0x00002004, &axi_qos->qosthres1);
238 writel(0x00000000, &axi_qos->qosthres2);
239 writel(0x00000001, &axi_qos->qosqon);
240
241 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
242 writel(0x00000000, &axi_qos->qosconf);
243 writel(0x000020A6, &axi_qos->qosctset0);
244 writel(0x00000001, &axi_qos->qosreqctr);
245 writel(0x00002064, &axi_qos->qosthres0);
246 writel(0x00002004, &axi_qos->qosthres1);
247 writel(0x00000000, &axi_qos->qosthres2);
248 writel(0x00000001, &axi_qos->qosqon);
249
250 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
251 writel(0x00000002, &axi_qos->qosconf);
252 writel(0x00002245, &axi_qos->qosctset0);
253 writel(0x00002096, &axi_qos->qosctset1);
254 writel(0x00002030, &axi_qos->qosctset2);
255 writel(0x00002030, &axi_qos->qosctset3);
256 writel(0x00000001, &axi_qos->qosreqctr);
257 writel(0x00002064, &axi_qos->qosthres0);
258 writel(0x00002004, &axi_qos->qosthres1);
259 writel(0x00000000, &axi_qos->qosthres2);
260 writel(0x00000001, &axi_qos->qosqon);
261
262 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
263 writel(0x00000002, &axi_qos->qosconf);
264 writel(0x00002245, &axi_qos->qosctset0);
265 writel(0x00002096, &axi_qos->qosctset1);
266 writel(0x00002030, &axi_qos->qosctset2);
267 writel(0x00002030, &axi_qos->qosctset3);
268 writel(0x00000001, &axi_qos->qosreqctr);
269 writel(0x00002064, &axi_qos->qosthres0);
270 writel(0x00002004, &axi_qos->qosthres1);
271 writel(0x00000000, &axi_qos->qosthres2);
272 writel(0x00000001, &axi_qos->qosqon);
273
274 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
275 writel(0x00000002, &axi_qos->qosconf);
276 writel(0x00002245, &axi_qos->qosctset0);
277 writel(0x00002096, &axi_qos->qosctset1);
278 writel(0x00002030, &axi_qos->qosctset2);
279 writel(0x00002030, &axi_qos->qosctset3);
280 writel(0x00000001, &axi_qos->qosreqctr);
281 writel(0x00002064, &axi_qos->qosthres0);
282 writel(0x00002004, &axi_qos->qosthres1);
283 writel(0x00000000, &axi_qos->qosthres2);
284 writel(0x00000001, &axi_qos->qosqon);
285
286 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
287 writel(0x00000000, &axi_qos->qosconf);
288 writel(0x0000214C, &axi_qos->qosctset0);
289 writel(0x00000001, &axi_qos->qosreqctr);
290 writel(0x00002064, &axi_qos->qosthres0);
291 writel(0x00002004, &axi_qos->qosthres1);
292 writel(0x00000000, &axi_qos->qosthres2);
293 writel(0x00000001, &axi_qos->qosqon);
294
295 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
296 writel(0x00000001, &axi_qos->qosconf);
297 writel(0x00002004, &axi_qos->qosctset0);
298 writel(0x00002096, &axi_qos->qosctset1);
299 writel(0x00002030, &axi_qos->qosctset2);
300 writel(0x00002030, &axi_qos->qosctset3);
301 writel(0x00000001, &axi_qos->qosreqctr);
302 writel(0x00002064, &axi_qos->qosthres0);
303 writel(0x00002004, &axi_qos->qosthres1);
304 writel(0x00000000, &axi_qos->qosthres2);
305 writel(0x00000001, &axi_qos->qosqon);
306
307 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
308 writel(0x00000001, &axi_qos->qosconf);
309 writel(0x00002004, &axi_qos->qosctset0);
310 writel(0x00002096, &axi_qos->qosctset1);
311 writel(0x00002030, &axi_qos->qosctset2);
312 writel(0x00002030, &axi_qos->qosctset3);
313 writel(0x00000001, &axi_qos->qosreqctr);
314 writel(0x00002064, &axi_qos->qosthres0);
315 writel(0x00002004, &axi_qos->qosthres1);
316 writel(0x00000000, &axi_qos->qosthres2);
317 writel(0x00000001, &axi_qos->qosqon);
318
319 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
320 writel(0x00000001, &axi_qos->qosconf);
321 writel(0x00002004, &axi_qos->qosctset0);
322 writel(0x00002096, &axi_qos->qosctset1);
323 writel(0x00002030, &axi_qos->qosctset2);
324 writel(0x00002030, &axi_qos->qosctset3);
325 writel(0x00000001, &axi_qos->qosreqctr);
326 writel(0x00002064, &axi_qos->qosthres0);
327 writel(0x00002004, &axi_qos->qosthres1);
328 writel(0x00000000, &axi_qos->qosthres2);
329 writel(0x00000001, &axi_qos->qosqon);
330
331 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
332 writel(0x00000001, &axi_qos->qosconf);
333 writel(0x00002004, &axi_qos->qosctset0);
334 writel(0x00002096, &axi_qos->qosctset1);
335 writel(0x00002030, &axi_qos->qosctset2);
336 writel(0x00002030, &axi_qos->qosctset3);
337 writel(0x00000001, &axi_qos->qosreqctr);
338 writel(0x00002064, &axi_qos->qosthres0);
339 writel(0x00002004, &axi_qos->qosthres1);
340 writel(0x00000000, &axi_qos->qosthres2);
341 writel(0x00000001, &axi_qos->qosqon);
342
343 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
344 writel(0x00000002, &axi_qos->qosconf);
345 writel(0x00002245, &axi_qos->qosctset0);
346 writel(0x00002096, &axi_qos->qosctset1);
347 writel(0x00002030, &axi_qos->qosctset2);
348 writel(0x00002030, &axi_qos->qosctset3);
349 writel(0x00000001, &axi_qos->qosreqctr);
350 writel(0x00002064, &axi_qos->qosthres0);
351 writel(0x00002004, &axi_qos->qosthres1);
352 writel(0x00000000, &axi_qos->qosthres2);
353 writel(0x00000001, &axi_qos->qosqon);
354
355 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
356 writel(0x00000000, &axi_qos->qosconf);
357 writel(0x000020A6, &axi_qos->qosctset0);
358 writel(0x00000001, &axi_qos->qosreqctr);
359 writel(0x00002064, &axi_qos->qosthres0);
360 writel(0x00002004, &axi_qos->qosthres1);
361 writel(0x00000000, &axi_qos->qosthres2);
362 writel(0x00000001, &axi_qos->qosqon);
363
364 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
365 writel(0x00000000, &axi_qos->qosconf);
366 writel(0x000020A6, &axi_qos->qosctset0);
367 writel(0x00000001, &axi_qos->qosreqctr);
368 writel(0x00002064, &axi_qos->qosthres0);
369 writel(0x00002004, &axi_qos->qosthres1);
370 writel(0x00000000, &axi_qos->qosthres2);
371 writel(0x00000001, &axi_qos->qosqon);
372
373 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
374 writel(0x00000000, &axi_qos->qosconf);
375 writel(0x00002053, &axi_qos->qosctset0);
376 writel(0x00000001, &axi_qos->qosreqctr);
377 writel(0x00002064, &axi_qos->qosthres0);
378 writel(0x00002004, &axi_qos->qosthres1);
379 writel(0x00000000, &axi_qos->qosthres2);
380 writel(0x00000001, &axi_qos->qosqon);
381
382 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
383 writel(0x00000000, &axi_qos->qosconf);
384 writel(0x00002053, &axi_qos->qosctset0);
385 writel(0x00000001, &axi_qos->qosreqctr);
386 writel(0x00002064, &axi_qos->qosthres0);
387 writel(0x00002004, &axi_qos->qosthres1);
388 writel(0x00000000, &axi_qos->qosthres2);
389 writel(0x00000001, &axi_qos->qosqon);
390
391 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
392 writel(0x00000002, &axi_qos->qosconf);
393 writel(0x00002245, &axi_qos->qosctset0);
394 writel(0x00000001, &axi_qos->qosreqctr);
395 writel(0x00002064, &axi_qos->qosthres0);
396 writel(0x00002004, &axi_qos->qosthres1);
397 writel(0x00000000, &axi_qos->qosthres2);
398 writel(0x00000001, &axi_qos->qosqon);
399
400 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
401 writel(0x00000000, &axi_qos->qosconf);
402 writel(0x00002029, &axi_qos->qosctset0);
403 writel(0x00000001, &axi_qos->qosreqctr);
404 writel(0x00002064, &axi_qos->qosthres0);
405 writel(0x00002004, &axi_qos->qosthres1);
406 writel(0x00000000, &axi_qos->qosthres2);
407 writel(0x00000001, &axi_qos->qosqon);
408
409 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
410 writel(0x00000002, &axi_qos->qosconf);
411 writel(0x00002245, &axi_qos->qosctset0);
412 writel(0x00000001, &axi_qos->qosreqctr);
413 writel(0x00002064, &axi_qos->qosthres0);
414 writel(0x00002004, &axi_qos->qosthres1);
415 writel(0x00000000, &axi_qos->qosthres2);
416 writel(0x00000001, &axi_qos->qosqon);
417
418 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
419 writel(0x00000000, &axi_qos->qosconf);
420 writel(0x00002053, &axi_qos->qosctset0);
421 writel(0x00000001, &axi_qos->qosreqctr);
422 writel(0x00002064, &axi_qos->qosthres0);
423 writel(0x00002004, &axi_qos->qosthres1);
424 writel(0x00000000, &axi_qos->qosthres2);
425 writel(0x00000001, &axi_qos->qosqon);
426
427 axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
428 writel(0x00000000, &axi_qos->qosconf);
429 writel(0x000020A6, &axi_qos->qosctset0);
430 writel(0x00000001, &axi_qos->qosreqctr);
431 writel(0x00002064, &axi_qos->qosthres0);
432 writel(0x00002004, &axi_qos->qosthres1);
433 writel(0x00000000, &axi_qos->qosthres2);
434 writel(0x00000001, &axi_qos->qosqon);
435
436 axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
437 writel(0x00000000, &axi_qos->qosconf);
438 writel(0x00002053, &axi_qos->qosctset0);
439 writel(0x00000001, &axi_qos->qosreqctr);
440 writel(0x00002064, &axi_qos->qosthres0);
441 writel(0x00002004, &axi_qos->qosthres1);
442 writel(0x00000000, &axi_qos->qosthres2);
443 writel(0x00000001, &axi_qos->qosqon);
444
445 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
446 writel(0x00000002, &axi_qos->qosconf);
447 writel(0x00002245, &axi_qos->qosctset0);
448 writel(0x00000001, &axi_qos->qosreqctr);
449 writel(0x00002064, &axi_qos->qosthres0);
450 writel(0x00002004, &axi_qos->qosthres1);
451 writel(0x00000000, &axi_qos->qosthres2);
452 writel(0x00000001, &axi_qos->qosqon);
453
454 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
455 writel(0x00000000, &axi_qos->qosconf);
456 writel(0x0000214C, &axi_qos->qosctset0);
457 writel(0x00000001, &axi_qos->qosreqctr);
458 writel(0x00002064, &axi_qos->qosthres0);
459 writel(0x00002004, &axi_qos->qosthres1);
460 writel(0x00000000, &axi_qos->qosthres2);
461 writel(0x00000001, &axi_qos->qosqon);
462
463 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
464 writel(0x00000000, &axi_qos->qosconf);
465 writel(0x0000214C, &axi_qos->qosctset0);
466 writel(0x00000001, &axi_qos->qosreqctr);
467 writel(0x00002064, &axi_qos->qosthres0);
468 writel(0x00002004, &axi_qos->qosthres1);
469 writel(0x00000000, &axi_qos->qosthres2);
470 writel(0x00000001, &axi_qos->qosqon);
471
472 axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
473 writel(0x00000000, &axi_qos->qosconf);
474 writel(0x000020A6, &axi_qos->qosctset0);
475 writel(0x00000001, &axi_qos->qosreqctr);
476 writel(0x00002064, &axi_qos->qosthres0);
477 writel(0x00002004, &axi_qos->qosthres1);
478 writel(0x00000000, &axi_qos->qosthres2);
479 writel(0x00000001, &axi_qos->qosqon);
480
481 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
482 writel(0x00000000, &axi_qos->qosconf);
483 writel(0x00002053, &axi_qos->qosctset0);
484 writel(0x00000001, &axi_qos->qosreqctr);
485 writel(0x00002064, &axi_qos->qosthres0);
486 writel(0x00002004, &axi_qos->qosthres1);
487 writel(0x00000000, &axi_qos->qosthres2);
488 writel(0x00000001, &axi_qos->qosqon);
489
490 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
491 writel(0x00000000, &axi_qos->qosconf);
492 writel(0x00002053, &axi_qos->qosctset0);
493 writel(0x00000001, &axi_qos->qosreqctr);
494 writel(0x00002064, &axi_qos->qosthres0);
495 writel(0x00002004, &axi_qos->qosthres1);
496 writel(0x00000000, &axi_qos->qosthres2);
497 writel(0x00000001, &axi_qos->qosqon);
498
499 /* QoS Register (RT-AXI) */
500 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsuf1ee1632015-03-05 08:30:40 +0900[diff] [blame]501 writel(0x00000001, &axi_qos->qosconf);
Nobuhiro Iwamatsuddbf3032014-06-26 10:23:30 +0900[diff] [blame]502 writel(0x00002053, &axi_qos->qosctset0);
503 writel(0x00002096, &axi_qos->qosctset1);
504 writel(0x00002030, &axi_qos->qosctset2);
505 writel(0x00002030, &axi_qos->qosctset3);
506 writel(0x00000001, &axi_qos->qosreqctr);
507 writel(0x00002064, &axi_qos->qosthres0);
508 writel(0x00002004, &axi_qos->qosthres1);
509 writel(0x00000000, &axi_qos->qosthres2);
510 writel(0x00000001, &axi_qos->qosqon);
511
512 axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
513 writel(0x00000000, &axi_qos->qosconf);
514 writel(0x00002053, &axi_qos->qosctset0);
515 writel(0x00002096, &axi_qos->qosctset1);
516 writel(0x00002030, &axi_qos->qosctset2);
517 writel(0x00002030, &axi_qos->qosctset3);
518 writel(0x00000001, &axi_qos->qosreqctr);
519 writel(0x00002064, &axi_qos->qosthres0);
520 writel(0x00002004, &axi_qos->qosthres1);
521 writel(0x00000000, &axi_qos->qosthres2);
522 writel(0x00000001, &axi_qos->qosqon);
523
524 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
525 writel(0x00000002, &axi_qos->qosconf);
526 writel(0x00002245, &axi_qos->qosctset0);
527 writel(0x00002096, &axi_qos->qosctset1);
528 writel(0x00002030, &axi_qos->qosctset2);
529 writel(0x00002030, &axi_qos->qosctset3);
530 writel(0x00000001, &axi_qos->qosreqctr);
531 writel(0x00002064, &axi_qos->qosthres0);
532 writel(0x00002004, &axi_qos->qosthres1);
533 writel(0x00000000, &axi_qos->qosthres2);
534 writel(0x00000001, &axi_qos->qosqon);
535
536 axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
537 writel(0x00000002, &axi_qos->qosconf);
538 writel(0x00002245, &axi_qos->qosctset0);
539 writel(0x00000001, &axi_qos->qosreqctr);
540 writel(0x00002064, &axi_qos->qosthres0);
541 writel(0x00002004, &axi_qos->qosthres1);
542 writel(0x00000000, &axi_qos->qosthres2);
543 writel(0x00000001, &axi_qos->qosqon);
544
545 /* QoS Register (MP-AXI) */
546 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
547 writel(0x00000000, &axi_qos->qosconf);
548 writel(0x00002037, &axi_qos->qosctset0);
549 writel(0x00000001, &axi_qos->qosreqctr);
550 writel(0x00002064, &axi_qos->qosthres0);
551 writel(0x00002004, &axi_qos->qosthres1);
552 writel(0x00000000, &axi_qos->qosthres2);
553 writel(0x00000001, &axi_qos->qosqon);
554
555 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
556 writel(0x00000001, &axi_qos->qosconf);
557 writel(0x00002014, &axi_qos->qosctset0);
558 writel(0x00000040, &axi_qos->qosreqctr);
559 writel(0x00002064, &axi_qos->qosthres0);
560 writel(0x00002004, &axi_qos->qosthres1);
561 writel(0x00000000, &axi_qos->qosthres2);
562 writel(0x00000001, &axi_qos->qosqon);
563
564 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
565 writel(0x00000001, &axi_qos->qosconf);
566 writel(0x00002014, &axi_qos->qosctset0);
567 writel(0x00000040, &axi_qos->qosreqctr);
568 writel(0x00002064, &axi_qos->qosthres0);
569 writel(0x00002004, &axi_qos->qosthres1);
570 writel(0x00000000, &axi_qos->qosthres2);
571 writel(0x00000001, &axi_qos->qosqon);
572
573 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
574 writel(0x00000001, &axi_qos->qosconf);
575 writel(0x00001FF0, &axi_qos->qosctset0);
576 writel(0x00000020, &axi_qos->qosreqctr);
577 writel(0x00002064, &axi_qos->qosthres0);
578 writel(0x00002004, &axi_qos->qosthres1);
579 writel(0x00002001, &axi_qos->qosthres2);
580 writel(0x00000001, &axi_qos->qosqon);
581
582 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
583 writel(0x00000001, &axi_qos->qosconf);
584 writel(0x00002004, &axi_qos->qosctset0);
585 writel(0x00002096, &axi_qos->qosctset1);
586 writel(0x00002030, &axi_qos->qosctset2);
587 writel(0x00002030, &axi_qos->qosctset3);
588 writel(0x00000001, &axi_qos->qosreqctr);
589 writel(0x00002064, &axi_qos->qosthres0);
590 writel(0x00002004, &axi_qos->qosthres1);
591 writel(0x00000000, &axi_qos->qosthres2);
592 writel(0x00000001, &axi_qos->qosqon);
593
594 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
595 writel(0x00000000, &axi_qos->qosconf);
596 writel(0x00002053, &axi_qos->qosctset0);
597 writel(0x00000001, &axi_qos->qosreqctr);
598 writel(0x00002064, &axi_qos->qosthres0);
599 writel(0x00002004, &axi_qos->qosthres1);
600 writel(0x00000000, &axi_qos->qosthres2);
601 writel(0x00000001, &axi_qos->qosqon);
602
603 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
604 writel(0x00000000, &axi_qos->qosconf);
605 writel(0x0000206E, &axi_qos->qosctset0);
606 writel(0x00000001, &axi_qos->qosreqctr);
607 writel(0x00002064, &axi_qos->qosthres0);
608 writel(0x00002004, &axi_qos->qosthres1);
609 writel(0x00000000, &axi_qos->qosthres2);
610 writel(0x00000001, &axi_qos->qosqon);
611
612 /* QoS Register (SYS-AXI256) */
613 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
614 writel(0x00000002, &axi_qos->qosconf);
615 writel(0x000020EB, &axi_qos->qosctset0);
616 writel(0x00002096, &axi_qos->qosctset1);
617 writel(0x00002030, &axi_qos->qosctset2);
618 writel(0x00002030, &axi_qos->qosctset3);
619 writel(0x00000001, &axi_qos->qosreqctr);
620 writel(0x00002064, &axi_qos->qosthres0);
621 writel(0x00002004, &axi_qos->qosthres1);
622 writel(0x00000000, &axi_qos->qosthres2);
623 writel(0x00000001, &axi_qos->qosqon);
624
625 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
626 writel(0x00000002, &axi_qos->qosconf);
627 writel(0x000020EB, &axi_qos->qosctset0);
628 writel(0x00002096, &axi_qos->qosctset1);
629 writel(0x00002030, &axi_qos->qosctset2);
630 writel(0x00002030, &axi_qos->qosctset3);
631 writel(0x00000001, &axi_qos->qosreqctr);
632 writel(0x00002064, &axi_qos->qosthres0);
633 writel(0x00002004, &axi_qos->qosthres1);
634 writel(0x00000000, &axi_qos->qosthres2);
635 writel(0x00000001, &axi_qos->qosqon);
636
637 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
638 writel(0x00000002, &axi_qos->qosconf);
639 writel(0x000020EB, &axi_qos->qosctset0);
640 writel(0x00002096, &axi_qos->qosctset1);
641 writel(0x00002030, &axi_qos->qosctset2);
642 writel(0x00002030, &axi_qos->qosctset3);
643 writel(0x00000001, &axi_qos->qosreqctr);
644 writel(0x00002064, &axi_qos->qosthres0);
645 writel(0x00002004, &axi_qos->qosthres1);
646 writel(0x00000000, &axi_qos->qosthres2);
647 writel(0x00000001, &axi_qos->qosqon);
648
649 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
650 writel(0x00000002, &axi_qos->qosconf);
651 writel(0x000020EB, &axi_qos->qosctset0);
652 writel(0x00002096, &axi_qos->qosctset1);
653 writel(0x00002030, &axi_qos->qosctset2);
654 writel(0x00002030, &axi_qos->qosctset3);
655 writel(0x00000001, &axi_qos->qosreqctr);
656 writel(0x00002064, &axi_qos->qosthres0);
657 writel(0x00002004, &axi_qos->qosthres1);
658 writel(0x00000000, &axi_qos->qosthres2);
659 writel(0x00000001, &axi_qos->qosqon);
660
661 /* QoS Register (CCI-AXI) */
662 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
663 writel(0x00000001, &axi_qos->qosconf);
664 writel(0x00002004, &axi_qos->qosctset0);
665 writel(0x00002096, &axi_qos->qosctset1);
666 writel(0x00002030, &axi_qos->qosctset2);
667 writel(0x00002030, &axi_qos->qosctset3);
668 writel(0x00000001, &axi_qos->qosreqctr);
669 writel(0x00002064, &axi_qos->qosthres0);
670 writel(0x00002004, &axi_qos->qosthres1);
671 writel(0x00000000, &axi_qos->qosthres2);
672 writel(0x00000001, &axi_qos->qosqon);
673
674 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
675 writel(0x00000002, &axi_qos->qosconf);
676 writel(0x00002245, &axi_qos->qosctset0);
677 writel(0x00002096, &axi_qos->qosctset1);
678 writel(0x00002030, &axi_qos->qosctset2);
679 writel(0x00002030, &axi_qos->qosctset3);
680 writel(0x00000001, &axi_qos->qosreqctr);
681 writel(0x00002064, &axi_qos->qosthres0);
682 writel(0x00002004, &axi_qos->qosthres1);
683 writel(0x00000000, &axi_qos->qosthres2);
684 writel(0x00000001, &axi_qos->qosqon);
685
686 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
687 writel(0x00000001, &axi_qos->qosconf);
688 writel(0x00002004, &axi_qos->qosctset0);
689 writel(0x00002096, &axi_qos->qosctset1);
690 writel(0x00002030, &axi_qos->qosctset2);
691 writel(0x00002030, &axi_qos->qosctset3);
692 writel(0x00000001, &axi_qos->qosreqctr);
693 writel(0x00002064, &axi_qos->qosthres0);
694 writel(0x00002004, &axi_qos->qosthres1);
695 writel(0x00000000, &axi_qos->qosthres2);
696 writel(0x00000001, &axi_qos->qosqon);
697
698 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
699 writel(0x00000001, &axi_qos->qosconf);
700 writel(0x00002004, &axi_qos->qosctset0);
701 writel(0x00002096, &axi_qos->qosctset1);
702 writel(0x00002030, &axi_qos->qosctset2);
703 writel(0x00002030, &axi_qos->qosctset3);
704 writel(0x00000001, &axi_qos->qosreqctr);
705 writel(0x00002064, &axi_qos->qosthres0);
706 writel(0x00002004, &axi_qos->qosthres1);
707 writel(0x00000000, &axi_qos->qosthres2);
708 writel(0x00000001, &axi_qos->qosqon);
709
710 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
711 writel(0x00000001, &axi_qos->qosconf);
712 writel(0x00002004, &axi_qos->qosctset0);
713 writel(0x00002096, &axi_qos->qosctset1);
714 writel(0x00002030, &axi_qos->qosctset2);
715 writel(0x00002030, &axi_qos->qosctset3);
716 writel(0x00000001, &axi_qos->qosreqctr);
717 writel(0x00002064, &axi_qos->qosthres0);
718 writel(0x00002004, &axi_qos->qosthres1);
719 writel(0x00000000, &axi_qos->qosthres2);
720 writel(0x00000001, &axi_qos->qosqon);
721
722 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
723 writel(0x00000002, &axi_qos->qosconf);
724 writel(0x00002245, &axi_qos->qosctset0);
725 writel(0x00002096, &axi_qos->qosctset1);
726 writel(0x00002030, &axi_qos->qosctset2);
727 writel(0x00002030, &axi_qos->qosctset3);
728 writel(0x00000001, &axi_qos->qosreqctr);
729 writel(0x00002064, &axi_qos->qosthres0);
730 writel(0x00002004, &axi_qos->qosthres1);
731 writel(0x00000000, &axi_qos->qosthres2);
732 writel(0x00000001, &axi_qos->qosqon);
733
734 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
735 writel(0x00000001, &axi_qos->qosconf);
736 writel(0x00002004, &axi_qos->qosctset0);
737 writel(0x00002096, &axi_qos->qosctset1);
738 writel(0x00002030, &axi_qos->qosctset2);
739 writel(0x00002030, &axi_qos->qosctset3);
740 writel(0x00000001, &axi_qos->qosreqctr);
741 writel(0x00002064, &axi_qos->qosthres0);
742 writel(0x00002004, &axi_qos->qosthres1);
743 writel(0x00000000, &axi_qos->qosthres2);
744 writel(0x00000001, &axi_qos->qosqon);
745
746 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
747 writel(0x00000001, &axi_qos->qosconf);
748 writel(0x00002004, &axi_qos->qosctset0);
749 writel(0x00002096, &axi_qos->qosctset1);
750 writel(0x00002030, &axi_qos->qosctset2);
751 writel(0x00002030, &axi_qos->qosctset3);
752 writel(0x00000001, &axi_qos->qosreqctr);
753 writel(0x00002064, &axi_qos->qosthres0);
754 writel(0x00002004, &axi_qos->qosthres1);
755 writel(0x00000000, &axi_qos->qosthres2);
756 writel(0x00000001, &axi_qos->qosqon);
757
758 /* QoS Register (Media-AXI) */
759 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
760 writel(0x00000002, &axi_qos->qosconf);
761 writel(0x000020DC, &axi_qos->qosctset0);
762 writel(0x00002096, &axi_qos->qosctset1);
763 writel(0x00002030, &axi_qos->qosctset2);
764 writel(0x00002030, &axi_qos->qosctset3);
765 writel(0x00000020, &axi_qos->qosreqctr);
766 writel(0x000020AA, &axi_qos->qosthres0);
767 writel(0x00002032, &axi_qos->qosthres1);
768 writel(0x00000001, &axi_qos->qosthres2);
769
770 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
771 writel(0x00000002, &axi_qos->qosconf);
772 writel(0x000020DC, &axi_qos->qosctset0);
773 writel(0x00002096, &axi_qos->qosctset1);
774 writel(0x00002030, &axi_qos->qosctset2);
775 writel(0x00002030, &axi_qos->qosctset3);
776 writel(0x00000020, &axi_qos->qosreqctr);
777 writel(0x000020AA, &axi_qos->qosthres0);
778 writel(0x00002032, &axi_qos->qosthres1);
779 writel(0x00000001, &axi_qos->qosthres2);
780
781 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
782 writel(0x00000001, &axi_qos->qosconf);
783 writel(0x00002190, &axi_qos->qosctset0);
784 writel(0x00000020, &axi_qos->qosreqctr);
785 writel(0x00002064, &axi_qos->qosthres0);
786 writel(0x00002004, &axi_qos->qosthres1);
787 writel(0x00000001, &axi_qos->qosthres2);
788 writel(0x00000001, &axi_qos->qosqon);
789
790 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
791 writel(0x00000001, &axi_qos->qosconf);
792 writel(0x00002190, &axi_qos->qosctset0);
793 writel(0x00000020, &axi_qos->qosreqctr);
794 writel(0x00000001, &axi_qos->qosthres0);
795 writel(0x00000001, &axi_qos->qosthres1);
796 writel(0x00000001, &axi_qos->qosthres2);
797 writel(0x00000001, &axi_qos->qosqon);
798
799 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
800 writel(0x00000001, &axi_qos->qosconf);
801 writel(0x00002190, &axi_qos->qosctset0);
802 writel(0x00000020, &axi_qos->qosreqctr);
803 writel(0x00002064, &axi_qos->qosthres0);
804 writel(0x00002004, &axi_qos->qosthres1);
805 writel(0x00000001, &axi_qos->qosthres2);
806 writel(0x00000001, &axi_qos->qosqon);
807
808 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
809 writel(0x00000001, &axi_qos->qosconf);
810 writel(0x00002190, &axi_qos->qosctset0);
811 writel(0x00000020, &axi_qos->qosreqctr);
812 writel(0x00000001, &axi_qos->qosthres0);
813 writel(0x00000001, &axi_qos->qosthres1);
814 writel(0x00000001, &axi_qos->qosthres2);
815 writel(0x00000001, &axi_qos->qosqon);
816
817 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
818 writel(0x00000001, &axi_qos->qosconf);
819 writel(0x00002190, &axi_qos->qosctset0);
820 writel(0x00000020, &axi_qos->qosreqctr);
821 writel(0x00002064, &axi_qos->qosthres0);
822 writel(0x00002004, &axi_qos->qosthres1);
823 writel(0x00000001, &axi_qos->qosthres2);
824 writel(0x00000001, &axi_qos->qosqon);
825
826 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
827 writel(0x00000001, &axi_qos->qosconf);
828 writel(0x00002190, &axi_qos->qosctset0);
829 writel(0x00000020, &axi_qos->qosreqctr);
830 writel(0x00000001, &axi_qos->qosthres0);
831 writel(0x00000001, &axi_qos->qosthres1);
832 writel(0x00000001, &axi_qos->qosthres2);
833 writel(0x00000001, &axi_qos->qosqon);
834
835 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
836 writel(0x00000001, &axi_qos->qosconf);
837 writel(0x00001FF0, &axi_qos->qosctset0);
838 writel(0x00000020, &axi_qos->qosreqctr);
839 writel(0x00002064, &axi_qos->qosthres0);
840 writel(0x00002004, &axi_qos->qosthres1);
841 writel(0x00002001, &axi_qos->qosthres2);
842 writel(0x00000001, &axi_qos->qosqon);
843
844 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
845 writel(0x00000001, &axi_qos->qosconf);
846 writel(0x000020C8, &axi_qos->qosctset0);
847 writel(0x00000020, &axi_qos->qosreqctr);
848 writel(0x00002064, &axi_qos->qosthres0);
849 writel(0x00002004, &axi_qos->qosthres1);
850 writel(0x00000001, &axi_qos->qosthres2);
851 writel(0x00000001, &axi_qos->qosqon);
852
853 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
854 writel(0x00000001, &axi_qos->qosconf);
855 writel(0x000020C8, &axi_qos->qosctset0);
856 writel(0x00000020, &axi_qos->qosreqctr);
857 writel(0x00000001, &axi_qos->qosthres0);
858 writel(0x00000001, &axi_qos->qosthres1);
859 writel(0x00000001, &axi_qos->qosthres2);
860 writel(0x00000001, &axi_qos->qosqon);
861
862 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
863 writel(0x00000001, &axi_qos->qosconf);
864 writel(0x000020C8, &axi_qos->qosctset0);
865 writel(0x00000020, &axi_qos->qosreqctr);
866 writel(0x00002064, &axi_qos->qosthres0);
867 writel(0x00002004, &axi_qos->qosthres1);
868 writel(0x00000001, &axi_qos->qosthres2);
869 writel(0x00000001, &axi_qos->qosqon);
870
871 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
872 writel(0x00000001, &axi_qos->qosconf);
873 writel(0x000020C8, &axi_qos->qosctset0);
874 writel(0x00000020, &axi_qos->qosreqctr);
875 writel(0x00002064, &axi_qos->qosthres0);
876 writel(0x00002004, &axi_qos->qosthres1);
877 writel(0x00000001, &axi_qos->qosthres2);
878 writel(0x00000001, &axi_qos->qosqon);
879
880 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
881 writel(0x00000001, &axi_qos->qosconf);
882 writel(0x000020C8, &axi_qos->qosctset0);
883 writel(0x00000020, &axi_qos->qosreqctr);
884 writel(0x00002064, &axi_qos->qosthres0);
885 writel(0x00002004, &axi_qos->qosthres1);
886 writel(0x00000001, &axi_qos->qosthres2);
887 writel(0x00000001, &axi_qos->qosqon);
888
889 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
890 writel(0x00000001, &axi_qos->qosconf);
891 writel(0x000020C8, &axi_qos->qosctset0);
892 writel(0x00000020, &axi_qos->qosreqctr);
893 writel(0x00000001, &axi_qos->qosthres0);
894 writel(0x00000001, &axi_qos->qosthres1);
895 writel(0x00000001, &axi_qos->qosthres2);
896 writel(0x00000001, &axi_qos->qosqon);
897
898 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
899 writel(0x00000001, &axi_qos->qosconf);
900 writel(0x000020C8, &axi_qos->qosctset0);
901 writel(0x00000020, &axi_qos->qosreqctr);
902 writel(0x00002064, &axi_qos->qosthres0);
903 writel(0x00002004, &axi_qos->qosthres1);
904 writel(0x00000001, &axi_qos->qosthres2);
905 writel(0x00000001, &axi_qos->qosqon);
906
907 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
908 writel(0x00000001, &axi_qos->qosconf);
909 writel(0x000020C8, &axi_qos->qosctset0);
910 writel(0x00000020, &axi_qos->qosreqctr);
911 writel(0x00002064, &axi_qos->qosthres0);
912 writel(0x00002004, &axi_qos->qosthres1);
913 writel(0x00000001, &axi_qos->qosthres2);
914 writel(0x00000001, &axi_qos->qosqon);
915
916 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
917 writel(0x00000003, &axi_qos->qosconf);
918 writel(0x000020C8, &axi_qos->qosctset0);
919 writel(0x00002064, &axi_qos->qosthres0);
920 writel(0x00002004, &axi_qos->qosthres1);
921 writel(0x00000001, &axi_qos->qosthres2);
922 writel(0x00000001, &axi_qos->qosqon);
923
924 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
925 writel(0x00000003, &axi_qos->qosconf);
926 writel(0x000020C8, &axi_qos->qosctset0);
927 writel(0x00002064, &axi_qos->qosthres0);
928 writel(0x00002004, &axi_qos->qosthres1);
929 writel(0x00000001, &axi_qos->qosthres2);
930 writel(0x00000001, &axi_qos->qosqon);
931
932 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
933 writel(0x00000003, &axi_qos->qosconf);
934 writel(0x00002063, &axi_qos->qosctset0);
935 writel(0x00000001, &axi_qos->qosreqctr);
936 writel(0x00002064, &axi_qos->qosthres0);
937 writel(0x00002004, &axi_qos->qosthres1);
938 writel(0x00000001, &axi_qos->qosthres2);
939 writel(0x00000001, &axi_qos->qosqon);
940
941 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
942 writel(0x00000003, &axi_qos->qosconf);
943 writel(0x00002063, &axi_qos->qosctset0);
944 writel(0x00000001, &axi_qos->qosreqctr);
945 writel(0x00002064, &axi_qos->qosthres0);
946 writel(0x00002004, &axi_qos->qosthres1);
947 writel(0x00000001, &axi_qos->qosthres2);
948 writel(0x00000001, &axi_qos->qosqon);
949
950 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
951 writel(0x00000001, &axi_qos->qosconf);
952 writel(0x00002073, &axi_qos->qosctset0);
953 writel(0x00000020, &axi_qos->qosreqctr);
954 writel(0x00002064, &axi_qos->qosthres0);
955 writel(0x00002004, &axi_qos->qosthres1);
956 writel(0x00000001, &axi_qos->qosthres2);
957 writel(0x00000001, &axi_qos->qosqon);
958
959 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
960 writel(0x00000001, &axi_qos->qosconf);
961 writel(0x00002073, &axi_qos->qosctset0);
962 writel(0x00000020, &axi_qos->qosreqctr);
963 writel(0x00000001, &axi_qos->qosthres0);
964 writel(0x00000001, &axi_qos->qosthres1);
965 writel(0x00000001, &axi_qos->qosthres2);
966 writel(0x00000001, &axi_qos->qosqon);
967
968 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
969 writel(0x00000001, &axi_qos->qosconf);
970 writel(0x00002073, &axi_qos->qosctset0);
971 writel(0x00000020, &axi_qos->qosreqctr);
972 writel(0x00002064, &axi_qos->qosthres0);
973 writel(0x00002004, &axi_qos->qosthres1);
974 writel(0x00000001, &axi_qos->qosthres2);
975 writel(0x00000001, &axi_qos->qosqon);
976
977 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
978 writel(0x00000001, &axi_qos->qosconf);
979 writel(0x00002073, &axi_qos->qosctset0);
980 writel(0x00000020, &axi_qos->qosreqctr);
981 writel(0x00000001, &axi_qos->qosthres0);
982 writel(0x00000001, &axi_qos->qosthres1);
983 writel(0x00000001, &axi_qos->qosthres2);
984 writel(0x00000001, &axi_qos->qosqon);
985
986 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
987 writel(0x00000001, &axi_qos->qosconf);
988 writel(0x00002073, &axi_qos->qosctset0);
989 writel(0x00000020, &axi_qos->qosreqctr);
990 writel(0x00002064, &axi_qos->qosthres0);
991 writel(0x00002004, &axi_qos->qosthres1);
992 writel(0x00000001, &axi_qos->qosthres2);
993 writel(0x00000001, &axi_qos->qosqon);
994}
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +0900[diff] [blame]995#else /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */
Nobuhiro Iwamatsua341e772014-10-31 16:16:28 +0900[diff] [blame]996void qos_init(void)
997{
998}
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +0900[diff] [blame]999#endif /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */