Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / e2c7643f1a920c90abf785c028863e51738d3f4b / . / configs / ls1021atwr_sdcard_qspi_defconfig
blob: 146ebf44be65067967944f44d94d121beb27708b [file] [log] [blame]
Alison Wangdd45cc52015-10-15 17:54:40 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
3CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]4CONFIG_COUNTER_FREQUENCY=12500000
Alison Wangdd45cc52015-10-15 17:54:40 +0800[diff] [blame]5CONFIG_TARGET_LS1021ATWR=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]6CONFIG_TEXT_BASE=0x82000000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]7CONFIG_SYS_MALLOC_LEN=0x1020000
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]8CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]9CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]10CONFIG_NR_DRAM_BANKS=1
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]11CONFIG_ENV_SIZE=0x20000
12CONFIG_ENV_OFFSET=0x300000
Tom Rini1a195882021-08-18 23:12:33 -0400[diff] [blame]13CONFIG_SYS_I2C_MXC_I2C1=y
14CONFIG_SYS_I2C_MXC_I2C2=y
15CONFIG_SYS_I2C_MXC_I2C3=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]16CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]17CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]18CONFIG_SPL_TEXT_BASE=0x10000000
Tom Rini3d2b97c2023-05-29 10:43:26 -0400[diff] [blame]19CONFIG_SYS_MONITOR_LEN=1048576
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]20CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]21CONFIG_SPL_SERIAL=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]22CONFIG_SPL_STACK=0x1001d000
Tom Rinib9dc6842024-04-22 17:24:09 -0600[diff] [blame]23CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
24CONFIG_SPL_BSS_START_ADDR=0x80100000
25CONFIG_SPL_BSS_MAX_SIZE=0x80000
Tom Rinic427a582024-10-08 09:18:32 -0600[diff] [blame]26CONFIG_SYS_BOOTM_LEN=0x4000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]27CONFIG_SYS_LOAD_ADDR=0x82000000
Tom Rinic427a582024-10-08 09:18:32 -0600[diff] [blame]28CONFIG_SPL=y
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]29CONFIG_PCI=y
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]30CONFIG_AHCI=y
Tom Rini9d291f42022-06-20 08:07:44 -0400[diff] [blame]31CONFIG_LAYERSCAPE_NS_ACCESS=y
Tom Rini7485ebf62022-06-20 08:07:45 -0400[diff] [blame]32CONFIG_PCIE1=y
33CONFIG_PCIE2=y
Tom Rini76fbc6f2022-04-01 10:33:18 -0400[diff] [blame]34CONFIG_SYS_MEMTEST_START=0x80000000
35CONFIG_SYS_MEMTEST_END=0x9fffffff
Alison Wangdbb78012016-05-04 12:45:55 +0800[diff] [blame]36CONFIG_FIT=y
37CONFIG_FIT_VERBOSE=y
Tom Rini9ff815a2021-08-24 23:11:49 -0400[diff] [blame]38CONFIG_RAMBOOT_PBL=y
39CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg"
40CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg"
Tom Riniadb7a192023-03-27 13:39:17 -0400[diff] [blame]41CONFIG_DISTRO_DEFAULTS=y
Tom Rini0d130ad2016-06-27 22:40:17 -0400[diff] [blame]42CONFIG_SD_BOOT=y
Tom Rinia43bf4e2021-12-11 14:55:50 -0500[diff] [blame]43CONFIG_SD_BOOT_QSPI=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]44CONFIG_BOOTDELAY=3
Tom Rini8d3a5882023-10-02 13:58:20 -0400[diff] [blame]45CONFIG_OF_BOARD_SETUP=y
46CONFIG_OF_STDOUT_VIA_ALIAS=y
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]47CONFIG_USE_BOOTARGS=y
48CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]49CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt"
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]50CONFIG_SYS_CBSIZE=256
51CONFIG_SYS_PBSIZE=276
Simon Glass4458d3b2016-10-17 20:12:35 -0600[diff] [blame]52CONFIG_SILENT_CONSOLE=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]53CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Tom Rinif05f9d82022-04-13 09:14:57 -0400[diff] [blame]54CONFIG_ARCH_MISC_INIT=y
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]55CONFIG_MISC_INIT_R=y
Tom Rini4abdf142021-08-17 17:59:41 -0400[diff] [blame]56CONFIG_ID_EEPROM=y
Tom Rinid209eda2022-08-10 10:29:27 -0400[diff] [blame]57CONFIG_SYS_EEPROM_BUS_NUM=1
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]58CONFIG_SPL_MAX_SIZE=0x1a000
59CONFIG_SPL_PAD_TO=0x1c000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]60CONFIG_SPL_FSL_PBL=y
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]61# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Simon Glass67e3fca2023-09-26 08:14:16 -0600[diff] [blame]62CONFIG_SPL_SYS_MALLOC=y
63CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
64CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x82100000
Simon Glass18422832024-08-22 07:55:00 -0600[diff] [blame]65CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
Semen Protsenko7e3ba482016-11-16 19:19:05 +0200[diff] [blame]66CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]67CONFIG_SPL_ENV_SUPPORT=y
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]68CONFIG_SPL_I2C=y
Simon Glass64571062021-08-08 12:20:16 -0600[diff] [blame]69CONFIG_SPL_MPC8XXX_INIT_DDR=y
Simon Glass1ba1d4e2021-07-10 21:14:28 -0600[diff] [blame]70CONFIG_SPL_WATCHDOG=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]71CONFIG_CMD_GREPENV=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]72CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]73CONFIG_CMD_MEMINFO=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]74CONFIG_CMD_MEMTEST=y
Biwen Liad6786d2021-02-05 19:02:07 +0800[diff] [blame]75CONFIG_CMD_GPIO=y
Tom Rini3c0d7a22021-02-15 13:34:30 -0500[diff] [blame]76CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]77CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]78CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]79CONFIG_CMD_USB=y
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]80# CONFIG_SPL_EFI_PARTITION is not set
Alison Wangdd45cc52015-10-15 17:54:40 +0800[diff] [blame]81CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]82CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]83CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]84CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinife586752022-03-11 09:12:07 -0500[diff] [blame]85CONFIG_USE_ETHPRIME=y
86CONFIG_ETHPRIME="ethernet@2d10000"
Simon Glass701ef062022-01-31 07:49:33 -0700[diff] [blame]87CONFIG_SATA=y
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]88CONFIG_SATA_CEVA=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]89CONFIG_FSL_CAAM=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]90CONFIG_MPC8XXX_GPIO=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]91CONFIG_DM_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]92CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]93CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]94CONFIG_SYS_I2C_EEPROM_ADDR=0x53
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]95CONFIG_FSL_ESDHC=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]96CONFIG_MTD=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]97CONFIG_SPI_FLASH_ATMEL=y
98CONFIG_SPI_FLASH_STMICRO=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]99CONFIG_PHY_ATHEROS=y
Vladimir Oltean940bf912020-07-16 18:09:09 +0800[diff] [blame]100CONFIG_DM_MDIO=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]101CONFIG_PHY_GIGE=y
Alison Wangdd45cc52015-10-15 17:54:40 +0800[diff] [blame]102CONFIG_E1000=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]103CONFIG_MII=y
Mario Sixda4fc932018-03-28 14:38:18 +0200[diff] [blame]104CONFIG_TSEC_ENET=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]105CONFIG_NVME_PCI=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]106CONFIG_PCIE_LAYERSCAPE_RC=y
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]107CONFIG_SYS_NS16550_SERIAL=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]108CONFIG_SPI=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]109CONFIG_DM_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]110CONFIG_FSL_DSPI=y
111CONFIG_FSL_QSPI=y
Masahiro Yamada58d00232016-06-04 07:35:03 +0900[diff] [blame]112CONFIG_USB=y
113CONFIG_USB_XHCI_HCD=y
Masahiro Yamadad3b72ca2016-06-04 07:35:04 +0900[diff] [blame]114CONFIG_USB_XHCI_DWC3=y