Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / bccfc2ee099ae1bc8781fc002ea462e12ca10e36 / . / configs / ls1021atwr_sdcard_qspi_defconfig
blob: c82c29781ac6af041acb678c34bcfff37fe496b7 [file] [log] [blame]
Alison Wangdd45cc52015-10-15 17:54:40 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_TARGET_LS1021ATWR=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x82000000
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]4CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]5CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Tom Rini56fd1e12020-11-30 12:50:32 -0500[diff] [blame]7CONFIG_SYS_MEMTEST_START=0x80000000
8CONFIG_SYS_MEMTEST_END=0x9fffffff
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]9CONFIG_ENV_SIZE=0x20000
10CONFIG_ENV_OFFSET=0x300000
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]11CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]13CONFIG_SPL_TEXT_BASE=0x10000000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]14CONFIG_SPL_MMC_SUPPORT=y
15CONFIG_SPL_SERIAL_SUPPORT=y
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]16CONFIG_SPL=y
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]17CONFIG_AHCI=y
Tom Rinie791a022017-08-11 11:20:19 -0400[diff] [blame]18CONFIG_DISTRO_DEFAULTS=y
Alison Wangdbb78012016-05-04 12:45:55 +0800[diff] [blame]19CONFIG_FIT=y
20CONFIG_FIT_VERBOSE=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]21CONFIG_OF_BOARD_SETUP=y
22CONFIG_OF_STDOUT_VIA_ALIAS=y
Tom Rinie5678e42019-06-01 14:20:25 -0400[diff] [blame]23CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
Tom Rini0d130ad2016-06-27 22:40:17 -0400[diff] [blame]24CONFIG_SD_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]25CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]26CONFIG_USE_BOOTARGS=y
27CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
Simon Glass4458d3b2016-10-17 20:12:35 -0600[diff] [blame]28CONFIG_SILENT_CONSOLE=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]29CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]30CONFIG_MISC_INIT_R=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]31CONFIG_SPL_FSL_PBL=y
Semen Protsenko7e3ba482016-11-16 19:19:05 +0200[diff] [blame]32CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
33CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]34CONFIG_SPL_ENV_SUPPORT=y
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame^]35CONFIG_SPL_I2C=y
Simon Glass7db65a82016-09-12 23:18:45 -0600[diff] [blame]36CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
Simon Glass1ba1d4e2021-07-10 21:14:28 -0600[diff] [blame]37CONFIG_SPL_WATCHDOG=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]38CONFIG_CMD_GREPENV=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]39CONFIG_CMD_MEMINFO=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]40CONFIG_CMD_MEMTEST=y
Biwen Liad6786d2021-02-05 19:02:07 +0800[diff] [blame]41CONFIG_CMD_GPIO=y
Tom Rini3c0d7a22021-02-15 13:34:30 -0500[diff] [blame]42CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]43CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]44CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]45CONFIG_CMD_USB=y
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]46# CONFIG_SPL_EFI_PARTITION is not set
Alison Wangdd45cc52015-10-15 17:54:40 +0800[diff] [blame]47CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]48CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]49CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]50CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Alison Wangdd45cc52015-10-15 17:54:40 +0800[diff] [blame]51CONFIG_DM=y
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]52CONFIG_SATA_CEVA=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]53CONFIG_FSL_CAAM=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]54CONFIG_DM_I2C=y
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]55CONFIG_FSL_ESDHC=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]56CONFIG_MTD=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]57CONFIG_SPI_FLASH_ATMEL=y
58CONFIG_SPI_FLASH_STMICRO=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]59CONFIG_PHY_ATHEROS=y
60CONFIG_DM_ETH=y
Vladimir Oltean940bf912020-07-16 18:09:09 +0800[diff] [blame]61CONFIG_DM_MDIO=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]62CONFIG_PHY_GIGE=y
Alison Wangdd45cc52015-10-15 17:54:40 +0800[diff] [blame]63CONFIG_E1000=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]64CONFIG_MII=y
Mario Sixda4fc932018-03-28 14:38:18 +0200[diff] [blame]65CONFIG_TSEC_ENET=y
Tom Rinifa943162020-10-29 10:48:01 -0400[diff] [blame]66CONFIG_NVME=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]67CONFIG_PCI=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]68CONFIG_PCIE_LAYERSCAPE_RC=y
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]69CONFIG_DM_SCSI=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]70CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]71CONFIG_SPI=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]72CONFIG_DM_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]73CONFIG_FSL_DSPI=y
74CONFIG_FSL_QSPI=y
Masahiro Yamada58d00232016-06-04 07:35:03 +0900[diff] [blame]75CONFIG_USB=y
76CONFIG_USB_XHCI_HCD=y
Masahiro Yamadad3b72ca2016-06-04 07:35:04 +0900[diff] [blame]77CONFIG_USB_XHCI_DWC3=y