Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_TARGET_LS1012AQDS=y |
Tom Rini | 2c7a8d4 | 2019-08-14 08:11:27 -0400 | [diff] [blame] | 3 | CONFIG_TFABOOT=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 4 | CONFIG_SYS_TEXT_BASE=0x82000000 |
Tom Rini | e25a03a | 2021-11-01 12:19:22 +0000 | [diff] [blame] | 5 | CONFIG_SYS_MALLOC_LEN=0x500000 |
Tom Rini | 2e262c4 | 2020-08-10 15:31:07 -0400 | [diff] [blame] | 6 | CONFIG_NR_DRAM_BANKS=2 |
Ashish Kumar | 17f36a2 | 2020-04-29 17:42:03 +0530 | [diff] [blame] | 7 | CONFIG_ENV_SIZE=0x2000 |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 8 | CONFIG_ENV_OFFSET=0x500000 |
Tom Rini | 47dece3 | 2020-04-28 16:15:47 -0400 | [diff] [blame] | 9 | CONFIG_ENV_SECT_SIZE=0x40000 |
Tom Rini | 6bd3b14 | 2020-02-06 13:42:52 -0500 | [diff] [blame] | 10 | CONFIG_DM_GPIO=y |
Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 11 | CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" |
Tom Rini | e24547a | 2022-03-30 18:07:32 -0400 | [diff] [blame^] | 12 | CONFIG_FSL_QIXIS=y |
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 13 | CONFIG_QSPI_AHB_INIT=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 14 | CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y |
| 15 | CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y |
| 16 | CONFIG_AHCI=y |
Tom Rini | 76fbc6f | 2022-04-01 10:33:18 -0400 | [diff] [blame] | 17 | CONFIG_SYS_MEMTEST_START=0x80000000 |
| 18 | CONFIG_SYS_MEMTEST_END=0x9fffffff |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 19 | CONFIG_DISTRO_DEFAULTS=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 20 | # CONFIG_SYS_MALLOC_F is not set |
| 21 | CONFIG_FIT_VERBOSE=y |
| 22 | CONFIG_OF_BOARD_SETUP=y |
| 23 | CONFIG_OF_STDOUT_VIA_ALIAS=y |
| 24 | CONFIG_BOOTDELAY=10 |
| 25 | CONFIG_USE_BOOTARGS=y |
| 26 | CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" |
| 27 | # CONFIG_USE_BOOTCOMMAND is not set |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 28 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 29 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
Tom Rini | f92b6fa | 2020-10-09 12:22:06 -0400 | [diff] [blame] | 30 | CONFIG_MISC_INIT_R=y |
Tom Rini | 4abdf14 | 2021-08-17 17:59:41 -0400 | [diff] [blame] | 31 | CONFIG_ID_EEPROM=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 32 | CONFIG_CMD_GREPENV=y |
| 33 | CONFIG_CMD_EEPROM=y |
Tom Rini | faed567 | 2021-08-17 17:59:45 -0400 | [diff] [blame] | 34 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 |
| 35 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 |
Tom Rini | 32c75d6 | 2020-05-26 15:06:18 -0400 | [diff] [blame] | 36 | CONFIG_CMD_MEMINFO=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 37 | CONFIG_CMD_MEMTEST=y |
| 38 | CONFIG_CMD_GPT=y |
| 39 | CONFIG_CMD_I2C=y |
| 40 | CONFIG_CMD_MMC=y |
| 41 | CONFIG_CMD_PCI=y |
Patrick Delaunay | 5a6b52b | 2019-02-27 15:20:37 +0100 | [diff] [blame] | 42 | CONFIG_CMD_SPI=y |
| 43 | CONFIG_DEFAULT_SPI_BUS=1 |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 44 | CONFIG_CMD_USB=y |
| 45 | # CONFIG_CMD_SETEXPR is not set |
| 46 | CONFIG_CMD_CACHE=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 47 | CONFIG_OF_CONTROL=y |
Kuldeep Singh | 248a293 | 2020-07-30 15:38:07 +0530 | [diff] [blame] | 48 | CONFIG_ENV_OVERWRITE=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 49 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
Patrick Delaunay | f8e932e | 2019-02-27 15:20:38 +0100 | [diff] [blame] | 50 | CONFIG_ENV_SPI_BUS=0 |
Patrick Delaunay | f8e932e | 2019-02-27 15:20:38 +0100 | [diff] [blame] | 51 | CONFIG_ENV_SPI_MAX_HZ=1000000 |
Patrick Delaunay | f8e932e | 2019-02-27 15:20:38 +0100 | [diff] [blame] | 52 | CONFIG_ENV_SPI_MODE=0x03 |
Tom Rini | ca63e71 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 53 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 54 | CONFIG_NET_RANDOM_ETHADDR=y |
| 55 | CONFIG_DM=y |
Simon Glass | 701ef06 | 2022-01-31 07:49:33 -0700 | [diff] [blame] | 56 | CONFIG_SATA=y |
Tom Rini | f4e64b9 | 2022-02-08 23:50:55 +0000 | [diff] [blame] | 57 | CONFIG_SCSI_AHCI=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 58 | CONFIG_SATA_CEVA=y |
Tom Rini | d391d8b | 2021-12-11 14:55:51 -0500 | [diff] [blame] | 59 | CONFIG_MPC8XXX_GPIO=y |
Tom Rini | 6bd3b14 | 2020-02-06 13:42:52 -0500 | [diff] [blame] | 60 | CONFIG_DM_I2C=y |
Tom Rini | b1b1307 | 2021-08-18 23:12:37 -0400 | [diff] [blame] | 61 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y |
Tom Rini | faed567 | 2021-08-17 17:59:45 -0400 | [diff] [blame] | 62 | CONFIG_SYS_I2C_EEPROM_ADDR=0x57 |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 63 | CONFIG_FSL_ESDHC=y |
Miquel Raynal | 803baa2 | 2019-10-03 19:50:08 +0200 | [diff] [blame] | 64 | CONFIG_MTD=y |
Tom Rini | e799f92 | 2019-12-04 17:18:38 -0500 | [diff] [blame] | 65 | CONFIG_DM_SPI_FLASH=y |
Patrick Delaunay | 0df8104 | 2019-02-27 15:20:36 +0100 | [diff] [blame] | 66 | CONFIG_SF_DEFAULT_BUS=1 |
Patrick Delaunay | 0df8104 | 2019-02-27 15:20:36 +0100 | [diff] [blame] | 67 | CONFIG_SF_DEFAULT_SPEED=10000000 |
Ashish Kumar | 820fa95 | 2019-05-31 16:03:28 +0530 | [diff] [blame] | 68 | # CONFIG_SPI_FLASH_BAR is not set |
Tom Rini | d391d8b | 2021-12-11 14:55:51 -0500 | [diff] [blame] | 69 | CONFIG_SPI_FLASH_EON=y |
Kuldeep Singh | 78f2882 | 2020-05-12 14:31:07 +0530 | [diff] [blame] | 70 | CONFIG_SPI_FLASH_SPANSION=y |
Tom Rini | d391d8b | 2021-12-11 14:55:51 -0500 | [diff] [blame] | 71 | CONFIG_SPI_FLASH_STMICRO=y |
| 72 | CONFIG_SPI_FLASH_SST=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 73 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
| 74 | CONFIG_FSL_PFE=y |
| 75 | CONFIG_DM_ETH=y |
| 76 | CONFIG_E1000=y |
Mark Kettenis | f8463d6 | 2022-01-22 20:38:11 +0100 | [diff] [blame] | 77 | CONFIG_NVME_PCI=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 78 | CONFIG_PCI=y |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 79 | CONFIG_PCIE_LAYERSCAPE_RC=y |
Tom Rini | 6bd3b14 | 2020-02-06 13:42:52 -0500 | [diff] [blame] | 80 | CONFIG_DM_RTC=y |
Heiko Schocher | b1f9d2c | 2020-10-16 10:41:46 +0200 | [diff] [blame] | 81 | CONFIG_RTC_PCF8563=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 82 | CONFIG_SCSI=y |
| 83 | CONFIG_DM_SCSI=y |
| 84 | CONFIG_SYS_NS16550=y |
| 85 | CONFIG_SPI=y |
| 86 | CONFIG_DM_SPI=y |
| 87 | CONFIG_FSL_DSPI=y |
Ashish Kumar | 820fa95 | 2019-05-31 16:03:28 +0530 | [diff] [blame] | 88 | CONFIG_FSL_QSPI=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 89 | CONFIG_USB=y |
Rajesh Bhagat | 45d8a54 | 2018-11-05 18:03:04 +0000 | [diff] [blame] | 90 | CONFIG_USB_XHCI_HCD=y |
| 91 | CONFIG_USB_XHCI_DWC3=y |