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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
wdenk4fc95692003-02-28 00:49:47 +00002/*
Shinya Kuribayashic824af82008-03-25 11:43:17 +09003 * Copyright (C) 1985 MIPS Computer Systems, Inc.
4 * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle
5 * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
Daniel Schwierzecka6dae712016-01-12 21:48:26 +01006 * Copyright (C) 2011 Wind River Systems,
7 * written by Ralf Baechle <ralf@linux-mips.org>
wdenk4fc95692003-02-28 00:49:47 +00008 */
Shinya Kuribayashic824af82008-03-25 11:43:17 +09009#ifndef _ASM_REGDEF_H
10#define _ASM_REGDEF_H
wdenk4fc95692003-02-28 00:49:47 +000011
Shinya Kuribayashic824af82008-03-25 11:43:17 +090012#include <asm/sgidefs.h>
13
14#if _MIPS_SIM == _MIPS_SIM_ABI32
wdenk4fc95692003-02-28 00:49:47 +000015
16/*
17 * Symbolic register names for 32 bit ABI
18 */
Shinya Kuribayashic824af82008-03-25 11:43:17 +090019#define zero $0 /* wired zero */
20#define AT $1 /* assembler temp - uppercase because of ".set at" */
21#define v0 $2 /* return value */
22#define v1 $3
23#define a0 $4 /* argument registers */
24#define a1 $5
25#define a2 $6
26#define a3 $7
27#define t0 $8 /* caller saved */
28#define t1 $9
29#define t2 $10
30#define t3 $11
31#define t4 $12
Daniel Schwierzecka6dae712016-01-12 21:48:26 +010032#define ta0 $12
Shinya Kuribayashic824af82008-03-25 11:43:17 +090033#define t5 $13
Daniel Schwierzecka6dae712016-01-12 21:48:26 +010034#define ta1 $13
Shinya Kuribayashic824af82008-03-25 11:43:17 +090035#define t6 $14
Daniel Schwierzecka6dae712016-01-12 21:48:26 +010036#define ta2 $14
Shinya Kuribayashic824af82008-03-25 11:43:17 +090037#define t7 $15
Daniel Schwierzecka6dae712016-01-12 21:48:26 +010038#define ta3 $15
Shinya Kuribayashic824af82008-03-25 11:43:17 +090039#define s0 $16 /* callee saved */
40#define s1 $17
41#define s2 $18
42#define s3 $19
43#define s4 $20
44#define s5 $21
45#define s6 $22
46#define s7 $23
47#define t8 $24 /* caller saved */
48#define t9 $25
49#define jp $25 /* PIC jump register */
50#define k0 $26 /* kernel scratch */
51#define k1 $27
52#define gp $28 /* global pointer */
53#define sp $29 /* stack pointer */
54#define fp $30 /* frame pointer */
wdenk4fc95692003-02-28 00:49:47 +000055#define s8 $30 /* same like fp! */
Shinya Kuribayashic824af82008-03-25 11:43:17 +090056#define ra $31 /* return address */
57
58#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
59
60#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
61
62#define zero $0 /* wired zero */
63#define AT $at /* assembler temp - uppercase because of ".set at" */
64#define v0 $2 /* return value - caller saved */
65#define v1 $3
66#define a0 $4 /* argument registers */
67#define a1 $5
68#define a2 $6
69#define a3 $7
70#define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */
71#define ta0 $8
72#define a5 $9
73#define ta1 $9
74#define a6 $10
75#define ta2 $10
76#define a7 $11
77#define ta3 $11
78#define t0 $12 /* caller saved */
79#define t1 $13
80#define t2 $14
81#define t3 $15
82#define s0 $16 /* callee saved */
83#define s1 $17
84#define s2 $18
85#define s3 $19
86#define s4 $20
87#define s5 $21
88#define s6 $22
89#define s7 $23
90#define t8 $24 /* caller saved */
91#define t9 $25 /* callee address for PIC/temp */
92#define jp $25 /* PIC jump register */
93#define k0 $26 /* kernel temporary */
94#define k1 $27
95#define gp $28 /* global pointer - caller saved for PIC */
96#define sp $29 /* stack pointer */
97#define fp $30 /* frame pointer */
98#define s8 $30 /* callee saved */
99#define ra $31 /* return address */
100
101#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
wdenk4fc95692003-02-28 00:49:47 +0000102
Shinya Kuribayashic824af82008-03-25 11:43:17 +0900103#endif /* _ASM_REGDEF_H */