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wdenk4fc95692003-02-28 00:49:47 +00001/*
Shinya Kuribayashic824af82008-03-25 11:43:17 +09002 * Copyright (C) 1985 MIPS Computer Systems, Inc.
3 * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle
4 * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
Daniel Schwierzecka6dae712016-01-12 21:48:26 +01005 * Copyright (C) 2011 Wind River Systems,
6 * written by Ralf Baechle <ralf@linux-mips.org>
7 *
8 * SPDX-License-Identifier: GPL-2.0
wdenk4fc95692003-02-28 00:49:47 +00009 */
Shinya Kuribayashic824af82008-03-25 11:43:17 +090010#ifndef _ASM_REGDEF_H
11#define _ASM_REGDEF_H
wdenk4fc95692003-02-28 00:49:47 +000012
Shinya Kuribayashic824af82008-03-25 11:43:17 +090013#include <asm/sgidefs.h>
14
15#if _MIPS_SIM == _MIPS_SIM_ABI32
wdenk4fc95692003-02-28 00:49:47 +000016
17/*
18 * Symbolic register names for 32 bit ABI
19 */
Shinya Kuribayashic824af82008-03-25 11:43:17 +090020#define zero $0 /* wired zero */
21#define AT $1 /* assembler temp - uppercase because of ".set at" */
22#define v0 $2 /* return value */
23#define v1 $3
24#define a0 $4 /* argument registers */
25#define a1 $5
26#define a2 $6
27#define a3 $7
28#define t0 $8 /* caller saved */
29#define t1 $9
30#define t2 $10
31#define t3 $11
32#define t4 $12
Daniel Schwierzecka6dae712016-01-12 21:48:26 +010033#define ta0 $12
Shinya Kuribayashic824af82008-03-25 11:43:17 +090034#define t5 $13
Daniel Schwierzecka6dae712016-01-12 21:48:26 +010035#define ta1 $13
Shinya Kuribayashic824af82008-03-25 11:43:17 +090036#define t6 $14
Daniel Schwierzecka6dae712016-01-12 21:48:26 +010037#define ta2 $14
Shinya Kuribayashic824af82008-03-25 11:43:17 +090038#define t7 $15
Daniel Schwierzecka6dae712016-01-12 21:48:26 +010039#define ta3 $15
Shinya Kuribayashic824af82008-03-25 11:43:17 +090040#define s0 $16 /* callee saved */
41#define s1 $17
42#define s2 $18
43#define s3 $19
44#define s4 $20
45#define s5 $21
46#define s6 $22
47#define s7 $23
48#define t8 $24 /* caller saved */
49#define t9 $25
50#define jp $25 /* PIC jump register */
51#define k0 $26 /* kernel scratch */
52#define k1 $27
53#define gp $28 /* global pointer */
54#define sp $29 /* stack pointer */
55#define fp $30 /* frame pointer */
wdenk4fc95692003-02-28 00:49:47 +000056#define s8 $30 /* same like fp! */
Shinya Kuribayashic824af82008-03-25 11:43:17 +090057#define ra $31 /* return address */
58
59#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
60
61#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
62
63#define zero $0 /* wired zero */
64#define AT $at /* assembler temp - uppercase because of ".set at" */
65#define v0 $2 /* return value - caller saved */
66#define v1 $3
67#define a0 $4 /* argument registers */
68#define a1 $5
69#define a2 $6
70#define a3 $7
71#define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */
72#define ta0 $8
73#define a5 $9
74#define ta1 $9
75#define a6 $10
76#define ta2 $10
77#define a7 $11
78#define ta3 $11
79#define t0 $12 /* caller saved */
80#define t1 $13
81#define t2 $14
82#define t3 $15
83#define s0 $16 /* callee saved */
84#define s1 $17
85#define s2 $18
86#define s3 $19
87#define s4 $20
88#define s5 $21
89#define s6 $22
90#define s7 $23
91#define t8 $24 /* caller saved */
92#define t9 $25 /* callee address for PIC/temp */
93#define jp $25 /* PIC jump register */
94#define k0 $26 /* kernel temporary */
95#define k1 $27
96#define gp $28 /* global pointer - caller saved for PIC */
97#define sp $29 /* stack pointer */
98#define fp $30 /* frame pointer */
99#define s8 $30 /* callee saved */
100#define ra $31 /* return address */
101
102#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
wdenk4fc95692003-02-28 00:49:47 +0000103
Shinya Kuribayashic824af82008-03-25 11:43:17 +0900104#endif /* _ASM_REGDEF_H */