Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / e18c355e2beca5524b6aabcadce332d92aaa0373 / . / configs / pico-imx8mq_defconfig
blob: cd005d09f2d08f2a8609681403dee752e1a46ac0 [file] [log] [blame]
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_IMX8M=y
3CONFIG_SYS_TEXT_BASE=0x40200000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x600000
Tom Rinid24700f2021-10-30 23:03:56 -0400[diff] [blame]5CONFIG_SPL_GPIO=y
6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]8CONFIG_ENV_SIZE=0x1000
9CONFIG_ENV_OFFSET=0x400000
Tom Rini1a195882021-08-18 23:12:33 -0400[diff] [blame]10CONFIG_SYS_I2C_MXC_I2C1=y
11CONFIG_SYS_I2C_MXC_I2C2=y
12CONFIG_SYS_I2C_MXC_I2C3=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]13CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]14CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]15CONFIG_SPL_TEXT_BASE=0x7E1000
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]16CONFIG_TARGET_PICO_IMX8MQ=y
Tom Rinid24700f2021-10-30 23:03:56 -0400[diff] [blame]17CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]18CONFIG_SPL_SERIAL=y
Tom Rinid24700f2021-10-30 23:03:56 -0400[diff] [blame]19CONFIG_SPL_DRIVERS_MISC=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]20CONFIG_SPL=y
Tom Rinif1b6dda2021-11-07 22:59:45 -0500[diff] [blame]21CONFIG_IMX_BOOTAUX=y
Alper Nebi Yasak2beb0f42022-01-29 18:25:30 +0300[diff] [blame]22CONFIG_REMAKE_ELF=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]23CONFIG_SYS_LOAD_ADDR=0x40480000
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]24CONFIG_FIT=y
25CONFIG_FIT_EXTERNAL_OFFSET=0x3000
26CONFIG_SPL_LOAD_FIT=y
Peng Fan644469a2021-10-22 10:42:18 +0800[diff] [blame]27# CONFIG_USE_SPL_FIT_GENERATOR is not set
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]28CONFIG_OF_SYSTEM_SETUP=y
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]29CONFIG_USE_BOOTCOMMAND=y
30CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
Tom Rini51876ec2020-06-16 19:06:11 -0400[diff] [blame]31CONFIG_BOARD_EARLY_INIT_F=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]32CONFIG_BOARD_LATE_INIT=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]33CONFIG_SPL_BOARD_INIT=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]34CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
35CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
Tom Rinid24700f2021-10-30 23:03:56 -0400[diff] [blame]36CONFIG_SPL_I2C=y
37CONFIG_SPL_POWER=y
38CONFIG_SPL_WATCHDOG=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]39CONFIG_HUSH_PARSER=y
40# CONFIG_BOOTM_NETBSD is not set
Tom Rini32c75d62020-05-26 15:06:18 -0400[diff] [blame]41# CONFIG_CMD_EXPORTENV is not set
42# CONFIG_CMD_IMPORTENV is not set
43# CONFIG_CMD_CRC32 is not set
44CONFIG_CMD_FUSE=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]45CONFIG_CMD_GPIO=y
46CONFIG_CMD_I2C=y
Tom Rini71b46042020-05-21 16:26:03 -0400[diff] [blame]47CONFIG_CMD_MMC=y
Tom Rini32c75d62020-05-26 15:06:18 -0400[diff] [blame]48CONFIG_CMD_DHCP=y
49CONFIG_CMD_MII=y
50CONFIG_CMD_PING=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]51CONFIG_CMD_CACHE=y
52CONFIG_CMD_REGULATOR=y
53CONFIG_CMD_EXT2=y
54CONFIG_CMD_EXT4=y
55CONFIG_CMD_EXT4_WRITE=y
56CONFIG_CMD_FAT=y
57CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]58CONFIG_ENV_OVERWRITE=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]59CONFIG_ENV_IS_IN_MMC=y
60CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinieb1f9092020-07-24 17:14:47 -0400[diff] [blame]61CONFIG_SYS_MMC_ENV_DEV=1
Tom Rinife586752022-03-11 09:12:07 -0500[diff] [blame]62CONFIG_USE_ETHPRIME=y
63CONFIG_ETHPRIME="FEC"
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]64CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]65CONFIG_MXC_GPIO=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]66CONFIG_DM_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]67CONFIG_SPL_SYS_I2C_LEGACY=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]68CONFIG_SUPPORT_EMMC_BOOT=y
69CONFIG_FSL_USDHC=y
Tom Rinie141f562021-11-07 22:59:42 -0500[diff] [blame]70CONFIG_PHYLIB=y
71CONFIG_PHY_ATHEROS=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]72CONFIG_DM_ETH=y
Tom Rinie141f562021-11-07 22:59:42 -0500[diff] [blame]73CONFIG_PHY_GIGE=y
Tom Rini26a00952021-10-30 23:03:52 -0400[diff] [blame]74CONFIG_FEC_MXC=y
Tom Rinie141f562021-11-07 22:59:42 -0500[diff] [blame]75CONFIG_MII=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]76CONFIG_PINCTRL=y
77CONFIG_PINCTRL_IMX8M=y
Simon Glass31339412021-08-08 12:20:27 -0600[diff] [blame]78CONFIG_SPL_POWER_LEGACY=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]79CONFIG_POWER_DOMAIN=y
80CONFIG_IMX8M_POWER_DOMAIN=y
81CONFIG_DM_REGULATOR=y
82CONFIG_DM_REGULATOR_FIXED=y
83CONFIG_DM_REGULATOR_GPIO=y
Simon Glass31339412021-08-08 12:20:27 -0600[diff] [blame]84CONFIG_SPL_POWER_I2C=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]85CONFIG_DM_RESET=y
Tom Rinid0193802020-06-09 10:46:46 -0400[diff] [blame]86CONFIG_MXC_UART=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]87CONFIG_DM_THERMAL=y