| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_IMX8M=y |
| 3 | CONFIG_SYS_TEXT_BASE=0x40200000 |
| Tom Rini | e25a03a | 2021-11-01 12:19:22 +0000 | [diff] [blame] | 4 | CONFIG_SYS_MALLOC_LEN=0x600000 |
| Tom Rini | d24700f | 2021-10-30 23:03:56 -0400 | [diff] [blame] | 5 | CONFIG_SPL_GPIO=y |
| 6 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 8 | CONFIG_ENV_SIZE=0x1000 |
| 9 | CONFIG_ENV_OFFSET=0x400000 |
| Tom Rini | 1a19588 | 2021-08-18 23:12:33 -0400 | [diff] [blame] | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
| 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
| 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 13 | CONFIG_DM_GPIO=y |
| Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 14 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi" |
| Tom Rini | 0332a1a | 2020-07-06 13:54:25 -0400 | [diff] [blame] | 15 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 16 | CONFIG_TARGET_PICO_IMX8MQ=y |
| Tom Rini | d24700f | 2021-10-30 23:03:56 -0400 | [diff] [blame] | 17 | CONFIG_SPL_MMC=y |
| Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 18 | CONFIG_SPL_SERIAL=y |
| Tom Rini | d24700f | 2021-10-30 23:03:56 -0400 | [diff] [blame] | 19 | CONFIG_SPL_DRIVERS_MISC=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 20 | CONFIG_SPL=y |
| Tom Rini | f1b6dda | 2021-11-07 22:59:45 -0500 | [diff] [blame] | 21 | CONFIG_IMX_BOOTAUX=y |
| Tom Rini | 0997ee0 | 2021-08-23 10:25:31 -0400 | [diff] [blame] | 22 | CONFIG_SYS_LOAD_ADDR=0x40480000 |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 23 | CONFIG_FIT=y |
| 24 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
| 25 | CONFIG_SPL_LOAD_FIT=y |
| Peng Fan | 644469a | 2021-10-22 10:42:18 +0800 | [diff] [blame^] | 26 | # CONFIG_USE_SPL_FIT_GENERATOR is not set |
| Tom Rini | 51876ec | 2020-06-16 19:06:11 -0400 | [diff] [blame] | 27 | CONFIG_BOARD_EARLY_INIT_F=y |
| Tom Rini | f92b6fa | 2020-10-09 12:22:06 -0400 | [diff] [blame] | 28 | CONFIG_BOARD_LATE_INIT=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 29 | CONFIG_SPL_BOARD_INIT=y |
| Tom Rini | d24700f | 2021-10-30 23:03:56 -0400 | [diff] [blame] | 30 | CONFIG_SPL_I2C=y |
| 31 | CONFIG_SPL_POWER=y |
| 32 | CONFIG_SPL_WATCHDOG=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 33 | CONFIG_HUSH_PARSER=y |
| 34 | # CONFIG_BOOTM_NETBSD is not set |
| Tom Rini | 32c75d6 | 2020-05-26 15:06:18 -0400 | [diff] [blame] | 35 | # CONFIG_CMD_EXPORTENV is not set |
| 36 | # CONFIG_CMD_IMPORTENV is not set |
| 37 | # CONFIG_CMD_CRC32 is not set |
| 38 | CONFIG_CMD_FUSE=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 39 | CONFIG_CMD_GPIO=y |
| 40 | CONFIG_CMD_I2C=y |
| Tom Rini | 71b4604 | 2020-05-21 16:26:03 -0400 | [diff] [blame] | 41 | CONFIG_CMD_MMC=y |
| Tom Rini | 32c75d6 | 2020-05-26 15:06:18 -0400 | [diff] [blame] | 42 | CONFIG_CMD_DHCP=y |
| 43 | CONFIG_CMD_MII=y |
| 44 | CONFIG_CMD_PING=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 45 | CONFIG_CMD_CACHE=y |
| 46 | CONFIG_CMD_REGULATOR=y |
| 47 | CONFIG_CMD_EXT2=y |
| 48 | CONFIG_CMD_EXT4=y |
| 49 | CONFIG_CMD_EXT4_WRITE=y |
| 50 | CONFIG_CMD_FAT=y |
| 51 | CONFIG_OF_CONTROL=y |
| Adam Ford | 710966e | 2020-07-03 06:48:56 -0500 | [diff] [blame] | 52 | CONFIG_ENV_OVERWRITE=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 53 | CONFIG_ENV_IS_IN_MMC=y |
| 54 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| Tom Rini | eb1f909 | 2020-07-24 17:14:47 -0400 | [diff] [blame] | 55 | CONFIG_SYS_MMC_ENV_DEV=1 |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 56 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
| 57 | CONFIG_DM_I2C=y |
| Tom Rini | 52b2e26 | 2021-08-18 23:12:24 -0400 | [diff] [blame] | 58 | CONFIG_SPL_SYS_I2C_LEGACY=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 59 | CONFIG_SUPPORT_EMMC_BOOT=y |
| 60 | CONFIG_FSL_USDHC=y |
| Tom Rini | e141f56 | 2021-11-07 22:59:42 -0500 | [diff] [blame] | 61 | CONFIG_PHYLIB=y |
| 62 | CONFIG_PHY_ATHEROS=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 63 | CONFIG_DM_ETH=y |
| Tom Rini | e141f56 | 2021-11-07 22:59:42 -0500 | [diff] [blame] | 64 | CONFIG_PHY_GIGE=y |
| Tom Rini | 26a0095 | 2021-10-30 23:03:52 -0400 | [diff] [blame] | 65 | CONFIG_FEC_MXC=y |
| Tom Rini | e141f56 | 2021-11-07 22:59:42 -0500 | [diff] [blame] | 66 | CONFIG_MII=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 67 | CONFIG_PINCTRL=y |
| 68 | CONFIG_PINCTRL_IMX8M=y |
| Simon Glass | 3133941 | 2021-08-08 12:20:27 -0600 | [diff] [blame] | 69 | CONFIG_SPL_POWER_LEGACY=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 70 | CONFIG_POWER_DOMAIN=y |
| 71 | CONFIG_IMX8M_POWER_DOMAIN=y |
| 72 | CONFIG_DM_REGULATOR=y |
| 73 | CONFIG_DM_REGULATOR_FIXED=y |
| 74 | CONFIG_DM_REGULATOR_GPIO=y |
| Simon Glass | 3133941 | 2021-08-08 12:20:27 -0600 | [diff] [blame] | 75 | CONFIG_SPL_POWER_I2C=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 76 | CONFIG_DM_RESET=y |
| Tom Rini | d019380 | 2020-06-09 10:46:46 -0400 | [diff] [blame] | 77 | CONFIG_MXC_UART=y |
| Marek Vasut | 0f97ed0 | 2020-04-29 20:09:08 +0200 | [diff] [blame] | 78 | CONFIG_DM_THERMAL=y |