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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
TsiChungLiewae831cd2008-01-14 17:46:19 -06002/*
3 *
4 * (C) Copyright 2000-2004
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
Alison Wang8bce3ec2012-03-26 21:49:03 +00007 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiewae831cd2008-01-14 17:46:19 -06008 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChungLiewae831cd2008-01-14 17:46:19 -06009 */
10
11/* CPU specific interrupt routine */
12#include <common.h>
13#include <asm/immap.h>
Alison Wang8bce3ec2012-03-26 21:49:03 +000014#include <asm/io.h>
TsiChungLiewae831cd2008-01-14 17:46:19 -060015
16int interrupt_init(void)
17{
Alison Wang8bce3ec2012-03-26 21:49:03 +000018 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
TsiChungLiewae831cd2008-01-14 17:46:19 -060019
20 /* Make sure all interrupts are disabled */
Alison Wang8bce3ec2012-03-26 21:49:03 +000021 setbits_be32(&intp->imrh0, 0xffffffff);
22 setbits_be32(&intp->imrl0, 0xffffffff);
TsiChungLiewae831cd2008-01-14 17:46:19 -060023
24 enable_interrupts();
25 return 0;
26}
27
28#if defined(CONFIG_MCFTMR)
29void dtimer_intr_setup(void)
30{
Alison Wang8bce3ec2012-03-26 21:49:03 +000031 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
TsiChungLiewae831cd2008-01-14 17:46:19 -060032
Alison Wang8bce3ec2012-03-26 21:49:03 +000033 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
34 clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK);
TsiChungLiewae831cd2008-01-14 17:46:19 -060035}
36#endif