ColdFire: Clean up checkpatch warnings for MCF5227x
Signed-off-by: Alison Wang <b18965@freescale.com>
diff --git a/arch/m68k/cpu/mcf5227x/interrupts.c b/arch/m68k/cpu/mcf5227x/interrupts.c
index 85828a6..a2cf519 100644
--- a/arch/m68k/cpu/mcf5227x/interrupts.c
+++ b/arch/m68k/cpu/mcf5227x/interrupts.c
@@ -3,7 +3,7 @@
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*
* See file CREDITS for list of people who contributed to this
@@ -28,14 +28,15 @@
/* CPU specific interrupt routine */
#include <common.h>
#include <asm/immap.h>
+#include <asm/io.h>
int interrupt_init(void)
{
- volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
+ int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
/* Make sure all interrupts are disabled */
- intp->imrh0 |= 0xFFFFFFFF;
- intp->imrl0 |= 0xFFFFFFFF;
+ setbits_be32(&intp->imrh0, 0xffffffff);
+ setbits_be32(&intp->imrl0, 0xffffffff);
enable_interrupts();
return 0;
@@ -44,9 +45,9 @@
#if defined(CONFIG_MCFTMR)
void dtimer_intr_setup(void)
{
- volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
+ int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
- intp->icr0[CONFIG_SYS_TMRINTR_NO] = CONFIG_SYS_TMRINTR_PRI;
- intp->imrh0 &= ~CONFIG_SYS_TMRINTR_MASK;
+ out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
+ clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK);
}
#endif