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git01.mediatek.com / filogic / uboot / df41fc634d9e2e7899dc1023a7390708e6d8b886 / . / test / dm / clk.c
blob: a966471dbd9621284675ea495cd8e99e440a9274 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]2/*
3 * Copyright (C) 2015 Google, Inc
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]4 */
5
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]6#include <clk.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]7#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -0600[diff] [blame]8#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -0700[diff] [blame]9#include <malloc.h>
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]10#include <asm/clk.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]11#include <dm/test.h>
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]12#include <dm/device-internal.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]13#include <linux/err.h>
Simon Glass75c4d412020-07-19 10:15:37 -0600[diff] [blame]14#include <test/test.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]15#include <test/ut.h>
16
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]17/* Base test of the clk uclass */
18static int dm_test_clk_base(struct unit_test_state *uts)
19{
20 struct udevice *dev;
21 struct clk clk_method1;
22 struct clk clk_method2;
23
24 /* Get the device using the clk device */
25 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &dev));
26
27 /* Get the same clk port in 2 different ways and compare */
Samuel Hollandbae0f4f2023-01-21 18:02:51 -0600[diff] [blame]28 ut_assertok(clk_get_by_index(dev, 0, &clk_method1));
29 ut_assertok(clk_get_by_name(dev, NULL, &clk_method2));
30 ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true);
31 ut_asserteq(clk_method1.id, clk_method2.id);
32
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]33 ut_assertok(clk_get_by_index(dev, 1, &clk_method1));
34 ut_assertok(clk_get_by_index_nodev(dev_ofnode(dev), 1, &clk_method2));
Sekhar Noricf3119d2019-08-01 19:12:55 +0530[diff] [blame]35 ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true);
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]36 ut_asserteq(clk_method1.id, clk_method2.id);
37
Ashok Reddy Soma8f03cef2023-08-30 10:31:42 +0200[diff] [blame]38 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test2", &dev));
39 ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE));
40
41 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test3", &dev));
42 ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE));
43
44 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test4", &dev));
45 ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE));
46
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]47 return 0;
48}
49
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]50DM_TEST(dm_test_clk_base, UT_TESTF_SCAN_FDT);
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]51
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]52static int dm_test_clk(struct unit_test_state *uts)
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]53{
Anup Patel8d28c3c2019-02-25 08:14:55 +0000[diff] [blame]54 struct udevice *dev_fixed, *dev_fixed_factor, *dev_clk, *dev_test;
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]55 ulong rate;
56
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]57 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed",
58 &dev_fixed));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]59
Anup Patel8d28c3c2019-02-25 08:14:55 +0000[diff] [blame]60 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed-factor",
61 &dev_fixed_factor));
62
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]63 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
64 &dev_clk));
65 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
66 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
67 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
68 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]69
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]70 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
71 &dev_test));
72 ut_assertok(sandbox_clk_test_get(dev_test));
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]73 ut_assertok(sandbox_clk_test_devm_get(dev_test));
Fabrice Gasnier11192712018-07-24 16:31:28 +0200[diff] [blame]74 ut_assertok(sandbox_clk_test_valid(dev_test));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]75
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]76 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
77 SANDBOX_CLK_TEST_ID_DEVM_NULL));
78 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
79 SANDBOX_CLK_TEST_ID_DEVM_NULL,
80 0));
81 ut_asserteq(0, sandbox_clk_test_enable(dev_test,
82 SANDBOX_CLK_TEST_ID_DEVM_NULL));
83 ut_asserteq(0, sandbox_clk_test_disable(dev_test,
84 SANDBOX_CLK_TEST_ID_DEVM_NULL));
85
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]86 ut_asserteq(1234,
87 sandbox_clk_test_get_rate(dev_test,
88 SANDBOX_CLK_TEST_ID_FIXED));
89 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
90 SANDBOX_CLK_TEST_ID_SPI));
91 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
92 SANDBOX_CLK_TEST_ID_I2C));
Jean-Jacques Hiblotc1e9c942019-10-22 14:00:07 +0200[diff] [blame]93 ut_asserteq(321, sandbox_clk_test_get_rate(dev_test,
94 SANDBOX_CLK_TEST_ID_DEVM1));
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]95 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
96 SANDBOX_CLK_TEST_ID_DEVM2));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]97
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]98 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED,
99 12345);
100 ut_assert(IS_ERR_VALUE(rate));
101 rate = sandbox_clk_test_get_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED);
102 ut_asserteq(1234, rate);
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]103
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]104 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
105 SANDBOX_CLK_TEST_ID_SPI,
106 1000));
107 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
108 SANDBOX_CLK_TEST_ID_I2C,
109 2000));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]110
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]111 ut_asserteq(1000, sandbox_clk_test_get_rate(dev_test,
112 SANDBOX_CLK_TEST_ID_SPI));
113 ut_asserteq(2000, sandbox_clk_test_get_rate(dev_test,
114 SANDBOX_CLK_TEST_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]115
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]116 ut_asserteq(1000, sandbox_clk_test_set_rate(dev_test,
117 SANDBOX_CLK_TEST_ID_SPI,
118 10000));
119 ut_asserteq(2000, sandbox_clk_test_set_rate(dev_test,
120 SANDBOX_CLK_TEST_ID_I2C,
121 20000));
122
123 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0);
124 ut_assert(IS_ERR_VALUE(rate));
125 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0);
126 ut_assert(IS_ERR_VALUE(rate));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]127
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]128 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
129 SANDBOX_CLK_TEST_ID_SPI));
130 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
131 SANDBOX_CLK_TEST_ID_I2C));
132
Dario Binacchib7f85892020-12-30 00:06:31 +0100[diff] [blame]133 ut_asserteq(5000, sandbox_clk_test_round_rate(dev_test,
134 SANDBOX_CLK_TEST_ID_SPI,
135 5000));
136 ut_asserteq(7000, sandbox_clk_test_round_rate(dev_test,
137 SANDBOX_CLK_TEST_ID_I2C,
138 7000));
139
140 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
141 SANDBOX_CLK_TEST_ID_SPI));
142 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
143 SANDBOX_CLK_TEST_ID_I2C));
144
145 rate = sandbox_clk_test_round_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0);
146 ut_assert(IS_ERR_VALUE(rate));
147 rate = sandbox_clk_test_round_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0);
148 ut_assert(IS_ERR_VALUE(rate));
149
150 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
151 SANDBOX_CLK_TEST_ID_SPI));
152 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
153 SANDBOX_CLK_TEST_ID_I2C));
154
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]155 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
156 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
157 ut_asserteq(10000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
158 ut_asserteq(20000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
159
160 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_SPI));
161 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
162 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
163
164 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_I2C));
165 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
166 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
167
168 ut_assertok(sandbox_clk_test_disable(dev_test,
169 SANDBOX_CLK_TEST_ID_SPI));
170 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
171 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
172
173 ut_assertok(sandbox_clk_test_disable(dev_test,
174 SANDBOX_CLK_TEST_ID_I2C));
175 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
176 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
177
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]178 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
179 SANDBOX_CLK_ID_SPI));
180 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
181 SANDBOX_CLK_ID_I2C));
182 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
183 SANDBOX_CLK_ID_UART2));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]184
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]185 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
186 SANDBOX_CLK_ID_UART1));
187 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]188 return 0;
189}
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]190DM_TEST(dm_test_clk, UT_TESTF_SCAN_FDT);
Neil Armstrong567a38b2018-04-03 11:44:19 +0200[diff] [blame]191
192static int dm_test_clk_bulk(struct unit_test_state *uts)
193{
194 struct udevice *dev_clk, *dev_test;
195
196 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
197 &dev_clk));
198 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
199 &dev_test));
200 ut_assertok(sandbox_clk_test_get_bulk(dev_test));
201
202 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
203 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
204
205 /* Fixed clock does not support enable, thus should not fail */
206 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
207 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
208 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
209
210 /* Fixed clock does not support disable, thus should not fail */
211 ut_assertok(sandbox_clk_test_disable_bulk(dev_test));
212 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
213 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
214
215 /* Fixed clock does not support enable, thus should not fail */
216 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
217 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
218 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
219
220 /* Fixed clock does not support disable, thus should not fail */
221 ut_assertok(sandbox_clk_test_release_bulk(dev_test));
222 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
223 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]224 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
Neil Armstrong567a38b2018-04-03 11:44:19 +0200[diff] [blame]225
226 return 0;
227}
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]228DM_TEST(dm_test_clk_bulk, UT_TESTF_SCAN_FDT);