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git01.mediatek.com / filogic / uboot / df41fc634d9e2e7899dc1023a7390708e6d8b886 / . / dts / upstream / Bindings / interconnect / qcom,msm8998-bwmon.yaml
blob: 05067e197abe810a8dd2457f6056b6eff3e5387c [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Interconnect Bandwidth Monitor
8
9maintainers:
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11
12description: |
13 Bandwidth Monitor measures current throughput on buses between various NoC
14 fabrics and provides information when it crosses configured thresholds.
15
16 Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845::
17 - Measuring the bandwidth between CPUs and Last Level Cache Controller -
18 called just BWMON,
19 - Measuring the bandwidth between Last Level Cache Controller and memory
20 (DDR) - called LLCC BWMON.
21
22properties:
23 compatible:
24 oneOf:
25 - const: qcom,msm8998-bwmon # BWMON v4
26 - items:
27 - enum:
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]28 - qcom,qcm2290-cpu-bwmon
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]29 - qcom,sc7180-cpu-bwmon
30 - qcom,sc7280-cpu-bwmon
31 - qcom,sc8280xp-cpu-bwmon
32 - qcom,sdm845-cpu-bwmon
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]33 - qcom,sm6115-cpu-bwmon
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]34 - qcom,sm6350-llcc-bwmon
35 - qcom,sm8250-cpu-bwmon
36 - qcom,sm8550-cpu-bwmon
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]37 - qcom,sm8650-cpu-bwmon
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]38 - const: qcom,sdm845-bwmon # BWMON v4, unified register space
39 - items:
40 - enum:
41 - qcom,sc7180-llcc-bwmon
42 - qcom,sc8280xp-llcc-bwmon
43 - qcom,sm6350-cpu-bwmon
44 - qcom,sm8250-llcc-bwmon
45 - qcom,sm8550-llcc-bwmon
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]46 - qcom,sm8650-llcc-bwmon
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]47 - const: qcom,sc7280-llcc-bwmon
48 - const: qcom,sc7280-llcc-bwmon # BWMON v5
49 - const: qcom,sdm845-llcc-bwmon # BWMON v5
50
51 interconnects:
52 maxItems: 1
53
54 interrupts:
55 maxItems: 1
56
57 operating-points-v2: true
58 opp-table:
59 type: object
60
61 reg:
62 # BWMON v5 uses one register address space, v1-v4 use one or two.
63 minItems: 1
64 maxItems: 2
65
66 reg-names:
67 minItems: 1
68 maxItems: 2
69
70required:
71 - compatible
72 - interconnects
73 - interrupts
74 - operating-points-v2
75 - opp-table
76 - reg
77
78additionalProperties: false
79
80allOf:
81 - if:
82 properties:
83 compatible:
84 const: qcom,msm8998-bwmon
85 then:
86 properties:
87 reg:
88 minItems: 2
89
90 reg-names:
91 items:
92 - const: monitor
93 - const: global
94
95 else:
96 properties:
97 reg:
98 maxItems: 1
99
100 reg-names:
101 maxItems: 1
102
103examples:
104 - |
105 #include <dt-bindings/interconnect/qcom,sdm845.h>
106 #include <dt-bindings/interrupt-controller/arm-gic.h>
107
108 pmu@1436400 {
109 compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon";
110 reg = <0x01436400 0x600>;
111 interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
112 interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
113
114 operating-points-v2 = <&cpu_bwmon_opp_table>;
115
116 cpu_bwmon_opp_table: opp-table {
117 compatible = "operating-points-v2";
118 opp-0 {
119 opp-peak-kBps = <4800000>;
120 };
121 opp-1 {
122 opp-peak-kBps = <9216000>;
123 };
124 opp-2 {
125 opp-peak-kBps = <15052800>;
126 };
127 opp-3 {
128 opp-peak-kBps = <20889600>;
129 };
130 opp-4 {
131 opp-peak-kBps = <25497600>;
132 };
133 };
134 };