blob: 73f809cdb783cf6026c59e39cb128136f36b7d49 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Interconnect Bandwidth Monitor
8
9maintainers:
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11
12description: |
13 Bandwidth Monitor measures current throughput on buses between various NoC
14 fabrics and provides information when it crosses configured thresholds.
15
16 Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845::
17 - Measuring the bandwidth between CPUs and Last Level Cache Controller -
18 called just BWMON,
19 - Measuring the bandwidth between Last Level Cache Controller and memory
20 (DDR) - called LLCC BWMON.
21
22properties:
23 compatible:
24 oneOf:
25 - const: qcom,msm8998-bwmon # BWMON v4
26 - items:
27 - enum:
28 - qcom,sc7180-cpu-bwmon
29 - qcom,sc7280-cpu-bwmon
30 - qcom,sc8280xp-cpu-bwmon
31 - qcom,sdm845-cpu-bwmon
32 - qcom,sm6350-llcc-bwmon
33 - qcom,sm8250-cpu-bwmon
34 - qcom,sm8550-cpu-bwmon
35 - const: qcom,sdm845-bwmon # BWMON v4, unified register space
36 - items:
37 - enum:
38 - qcom,sc7180-llcc-bwmon
39 - qcom,sc8280xp-llcc-bwmon
40 - qcom,sm6350-cpu-bwmon
41 - qcom,sm8250-llcc-bwmon
42 - qcom,sm8550-llcc-bwmon
43 - const: qcom,sc7280-llcc-bwmon
44 - const: qcom,sc7280-llcc-bwmon # BWMON v5
45 - const: qcom,sdm845-llcc-bwmon # BWMON v5
46
47 interconnects:
48 maxItems: 1
49
50 interrupts:
51 maxItems: 1
52
53 operating-points-v2: true
54 opp-table:
55 type: object
56
57 reg:
58 # BWMON v5 uses one register address space, v1-v4 use one or two.
59 minItems: 1
60 maxItems: 2
61
62 reg-names:
63 minItems: 1
64 maxItems: 2
65
66required:
67 - compatible
68 - interconnects
69 - interrupts
70 - operating-points-v2
71 - opp-table
72 - reg
73
74additionalProperties: false
75
76allOf:
77 - if:
78 properties:
79 compatible:
80 const: qcom,msm8998-bwmon
81 then:
82 properties:
83 reg:
84 minItems: 2
85
86 reg-names:
87 items:
88 - const: monitor
89 - const: global
90
91 else:
92 properties:
93 reg:
94 maxItems: 1
95
96 reg-names:
97 maxItems: 1
98
99examples:
100 - |
101 #include <dt-bindings/interconnect/qcom,sdm845.h>
102 #include <dt-bindings/interrupt-controller/arm-gic.h>
103
104 pmu@1436400 {
105 compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon";
106 reg = <0x01436400 0x600>;
107 interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
108 interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
109
110 operating-points-v2 = <&cpu_bwmon_opp_table>;
111
112 cpu_bwmon_opp_table: opp-table {
113 compatible = "operating-points-v2";
114 opp-0 {
115 opp-peak-kBps = <4800000>;
116 };
117 opp-1 {
118 opp-peak-kBps = <9216000>;
119 };
120 opp-2 {
121 opp-peak-kBps = <15052800>;
122 };
123 opp-3 {
124 opp-peak-kBps = <20889600>;
125 };
126 opp-4 {
127 opp-peak-kBps = <25497600>;
128 };
129 };
130 };