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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S3C/S5P/Exynos SoC I2C Controller
8
9maintainers:
10 - Krzysztof Kozlowski <krzk@kernel.org>
11
12properties:
13 compatible:
Tom Rini93743d22024-04-01 09:08:13 -040014 oneOf:
15 - enum:
16 - samsung,s3c2410-i2c
17 - samsung,s3c2440-i2c
18 # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
19 - samsung,s3c2440-hdmiphy-i2c
20 # For s3c2440-like I2C used as a host to SATA PHY controller on an
21 # internal bus:
22 - samsung,exynos5-sata-phy-i2c
23 - items:
24 - enum:
25 - samsung,exynos7885-i2c
26 - samsung,exynos850-i2c
27 - const: samsung,s3c2440-i2c
Tom Rini53633a82024-02-29 12:33:36 -050028
29 '#address-cells':
30 const: 1
31
32 clocks:
33 maxItems: 1
34
35 clock-names:
36 items:
37 - const: i2c
38
39 gpios:
40 description: |
41 The order of the GPIOs should be the following:: <SDA, SCL>. The GPIO
42 specifier depends on the gpio controller. Required in all cases except
43 for "samsung,s3c2440-hdmiphy-i2c" whose input/output lines are
44 permanently wired to the respective client.
45 This property is deprecated. Use "pinctrl-0" and "pinctrl-names" instead.
46 deprecated: true
47
48 interrupts:
49 maxItems: 1
50
51 reg:
52 maxItems: 1
53
54 samsung,i2c-max-bus-freq:
55 $ref: /schemas/types.yaml#/definitions/uint32
56 description:
57 Desired frequency in Hz of the bus.
58 default: 100000
59
60 samsung,i2c-sda-delay:
61 $ref: /schemas/types.yaml#/definitions/uint32
62 description:
63 Delay (in ns) applied to data line (SDA) edges.
64 default: 0
65
66 samsung,i2c-slave-addr:
67 $ref: /schemas/types.yaml#/definitions/uint32
68 description:
69 Slave address in multi-master environment.
70 default: 0
71
72 samsung,sysreg-phandle:
73 $ref: /schemas/types.yaml#/definitions/phandle
74 description: Pandle to syscon used to control the system registers.
75
76 '#size-cells':
77 const: 0
78
79required:
80 - compatible
81 - reg
82
83allOf:
84 - $ref: /schemas/i2c/i2c-controller.yaml#
85 - if:
86 properties:
87 compatible:
88 contains:
89 enum:
90 - samsung,s3c2440-hdmiphy-i2c
91 - samsung,exynos5-sata-phy-i2c
92 then:
93 properties:
94 gpios: false
95
96 - if:
97 properties:
98 compatible:
99 contains:
100 enum:
101 - samsung,s3c2410-i2c
102 - samsung,s3c2440-i2c
103 - samsung,s3c2440-hdmiphy-i2c
104 then:
105 required:
106 - interrupts
107
108unevaluatedProperties: false
109
110examples:
111 - |
112 #include <dt-bindings/clock/exynos5250.h>
113 #include <dt-bindings/interrupt-controller/arm-gic.h>
114
115 i2c@12c60000 {
116 compatible = "samsung,s3c2440-i2c";
117 reg = <0x12C60000 0x100>;
118 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
119 #address-cells = <1>;
120 #size-cells = <0>;
121 clocks = <&clock CLK_I2C0>;
122 clock-names = "i2c";
123 pinctrl-names = "default";
124 pinctrl-0 = <&i2c0_bus>;
125
126 samsung,sysreg-phandle = <&sysreg_system_controller>;
127 samsung,i2c-sda-delay = <100>;
128 samsung,i2c-max-bus-freq = <20000>;
129 samsung,i2c-slave-addr = <0x66>;
130
131 eeprom@50 {
132 compatible = "samsung,s524ad0xd1", "atmel,24c128";
133 reg = <0x50>;
134 };
135 };
136
137 i2c@12ce0000 {
138 compatible = "samsung,s3c2440-hdmiphy-i2c";
139 reg = <0x12CE0000 0x1000>;
140 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
141 #address-cells = <1>;
142 #size-cells = <0>;
143 clocks = <&clock CLK_I2C_HDMI>;
144 clock-names = "i2c";
145
146 samsung,i2c-sda-delay = <100>;
147 samsung,i2c-max-bus-freq = <66000>;
148
149 phy-i2c@38 {
150 compatible = "samsung,exynos4212-hdmiphy";
151 reg = <0x38>;
152 };
153 };
154
155 i2c@121d0000 {
156 compatible = "samsung,exynos5-sata-phy-i2c";
157 reg = <0x121D0000 0x100>;
158 #address-cells = <1>;
159 #size-cells = <0>;
160 clocks = <&clock CLK_SATA_PHYI2C>;
161 clock-names = "i2c";
162
163 samsung,i2c-sda-delay = <100>;
164 samsung,i2c-max-bus-freq = <40000>;
165
166 phy-i2c@38 {
167 compatible = "samsung,exynos-sataphy-i2c";
168 reg = <0x38>;
169 };
170 };