Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2013 Altera Corporation <www.altera.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 8 | #include <asm/arch/clock_manager.h> |
| 9 | #include <asm/arch/system_manager.h> |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 10 | #include <dm.h> |
| 11 | #include <dwmmc.h> |
| 12 | #include <errno.h> |
| 13 | #include <fdtdec.h> |
Masahiro Yamada | 75f82d0 | 2018-03-05 01:20:11 +0900 | [diff] [blame] | 14 | #include <linux/libfdt.h> |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 15 | #include <linux/err.h> |
| 16 | #include <malloc.h> |
| 17 | |
| 18 | DECLARE_GLOBAL_DATA_PTR; |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 19 | |
| 20 | static const struct socfpga_clock_manager *clock_manager_base = |
| 21 | (void *)SOCFPGA_CLKMGR_ADDRESS; |
| 22 | static const struct socfpga_system_manager *system_manager_base = |
| 23 | (void *)SOCFPGA_SYSMGR_ADDRESS; |
| 24 | |
Simon Glass | a3a4320 | 2016-07-05 17:10:16 -0600 | [diff] [blame] | 25 | struct socfpga_dwmci_plat { |
| 26 | struct mmc_config cfg; |
| 27 | struct mmc mmc; |
| 28 | }; |
| 29 | |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 30 | /* socfpga implmentation specific driver private data */ |
Chin Liang See | 48e7bf9 | 2015-11-26 09:43:43 +0800 | [diff] [blame] | 31 | struct dwmci_socfpga_priv_data { |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 32 | struct dwmci_host host; |
| 33 | unsigned int drvsel; |
| 34 | unsigned int smplsel; |
Chin Liang See | 48e7bf9 | 2015-11-26 09:43:43 +0800 | [diff] [blame] | 35 | }; |
| 36 | |
| 37 | static void socfpga_dwmci_clksel(struct dwmci_host *host) |
| 38 | { |
| 39 | struct dwmci_socfpga_priv_data *priv = host->priv; |
Dinh Nguyen | c4b66c4 | 2015-12-02 13:31:33 -0600 | [diff] [blame] | 40 | u32 sdmmc_mask = ((priv->smplsel & 0x7) << SYSMGR_SDMMC_SMPLSEL_SHIFT) | |
| 41 | ((priv->drvsel & 0x7) << SYSMGR_SDMMC_DRVSEL_SHIFT); |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 42 | |
| 43 | /* Disable SDMMC clock. */ |
Pavel Machek | 91c2f8f | 2014-07-19 23:57:59 +0200 | [diff] [blame] | 44 | clrbits_le32(&clock_manager_base->per_pll.en, |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 45 | CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK); |
| 46 | |
Chin Liang See | 48e7bf9 | 2015-11-26 09:43:43 +0800 | [diff] [blame] | 47 | debug("%s: drvsel %d smplsel %d\n", __func__, |
| 48 | priv->drvsel, priv->smplsel); |
Dinh Nguyen | c4b66c4 | 2015-12-02 13:31:33 -0600 | [diff] [blame] | 49 | writel(sdmmc_mask, &system_manager_base->sdmmcgrp_ctrl); |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 50 | |
| 51 | debug("%s: SYSMGR_SDMMCGRP_CTRL_REG = 0x%x\n", __func__, |
| 52 | readl(&system_manager_base->sdmmcgrp_ctrl)); |
| 53 | |
| 54 | /* Enable SDMMC clock */ |
Pavel Machek | 91c2f8f | 2014-07-19 23:57:59 +0200 | [diff] [blame] | 55 | setbits_le32(&clock_manager_base->per_pll.en, |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 56 | CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK); |
| 57 | } |
| 58 | |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 59 | static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev) |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 60 | { |
Marek Vasut | 1749723 | 2015-07-25 10:48:14 +0200 | [diff] [blame] | 61 | /* FIXME: probe from DT eventually too/ */ |
| 62 | const unsigned long clk = cm_get_mmc_controller_clk_hz(); |
| 63 | |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 64 | struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev); |
| 65 | struct dwmci_host *host = &priv->host; |
| 66 | int fifo_depth; |
Pavel Machek | 51d2113 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 67 | |
| 68 | if (clk == 0) { |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 69 | printf("DWMMC: MMC clock is zero!"); |
Marek Vasut | 1749723 | 2015-07-25 10:48:14 +0200 | [diff] [blame] | 70 | return -EINVAL; |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 71 | } |
| 72 | |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 73 | fifo_depth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 74 | "fifo-depth", 0); |
Marek Vasut | 1749723 | 2015-07-25 10:48:14 +0200 | [diff] [blame] | 75 | if (fifo_depth < 0) { |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 76 | printf("DWMMC: Can't get FIFO depth\n"); |
Marek Vasut | 1749723 | 2015-07-25 10:48:14 +0200 | [diff] [blame] | 77 | return -EINVAL; |
| 78 | } |
| 79 | |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 80 | host->name = dev->name; |
Simon Glass | ba1dea4 | 2017-05-17 17:18:05 -0600 | [diff] [blame] | 81 | host->ioaddr = (void *)devfdt_get_addr(dev); |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 82 | host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 83 | "bus-width", 4); |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 84 | host->clksel = socfpga_dwmci_clksel; |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 85 | |
| 86 | /* |
| 87 | * TODO(sjg@chromium.org): Remove the need for this hack. |
| 88 | * We only have one dwmmc block on gen5 SoCFPGA. |
| 89 | */ |
| 90 | host->dev_index = 0; |
Marek Vasut | 1749723 | 2015-07-25 10:48:14 +0200 | [diff] [blame] | 91 | /* Fixed clock divide by 4 which due to the SDMMC wrapper */ |
Pavel Machek | 51d2113 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 92 | host->bus_hz = clk; |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 93 | host->fifoth_val = MSIZE(0x2) | |
Marek Vasut | 1749723 | 2015-07-25 10:48:14 +0200 | [diff] [blame] | 94 | RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2); |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 95 | priv->drvsel = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 96 | "drvsel", 3); |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 97 | priv->smplsel = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 98 | "smplsel", 0); |
Chin Liang See | 48e7bf9 | 2015-11-26 09:43:43 +0800 | [diff] [blame] | 99 | host->priv = priv; |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 100 | |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 101 | return 0; |
Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 102 | } |
| 103 | |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 104 | static int socfpga_dwmmc_probe(struct udevice *dev) |
Marek Vasut | 1749723 | 2015-07-25 10:48:14 +0200 | [diff] [blame] | 105 | { |
Simon Glass | a3a4320 | 2016-07-05 17:10:16 -0600 | [diff] [blame] | 106 | #ifdef CONFIG_BLK |
| 107 | struct socfpga_dwmci_plat *plat = dev_get_platdata(dev); |
| 108 | #endif |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 109 | struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); |
| 110 | struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev); |
| 111 | struct dwmci_host *host = &priv->host; |
Simon Glass | a3a4320 | 2016-07-05 17:10:16 -0600 | [diff] [blame] | 112 | |
| 113 | #ifdef CONFIG_BLK |
Jaehoon Chung | bf819d0 | 2016-09-23 19:13:16 +0900 | [diff] [blame] | 114 | dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000); |
Simon Glass | a3a4320 | 2016-07-05 17:10:16 -0600 | [diff] [blame] | 115 | host->mmc = &plat->mmc; |
| 116 | #else |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 117 | int ret; |
Marek Vasut | 1749723 | 2015-07-25 10:48:14 +0200 | [diff] [blame] | 118 | |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 119 | ret = add_dwmci(host, host->bus_hz, 400000); |
| 120 | if (ret) |
| 121 | return ret; |
Simon Glass | a3a4320 | 2016-07-05 17:10:16 -0600 | [diff] [blame] | 122 | #endif |
| 123 | host->mmc->priv = &priv->host; |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 124 | upriv->mmc = host->mmc; |
Simon Glass | 77ca42b | 2016-05-01 13:52:34 -0600 | [diff] [blame] | 125 | host->mmc->dev = dev; |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 126 | |
Marek Vasut | 1749723 | 2015-07-25 10:48:14 +0200 | [diff] [blame] | 127 | return 0; |
| 128 | } |
| 129 | |
Simon Glass | a3a4320 | 2016-07-05 17:10:16 -0600 | [diff] [blame] | 130 | static int socfpga_dwmmc_bind(struct udevice *dev) |
| 131 | { |
| 132 | #ifdef CONFIG_BLK |
| 133 | struct socfpga_dwmci_plat *plat = dev_get_platdata(dev); |
| 134 | int ret; |
| 135 | |
| 136 | ret = dwmci_bind(dev, &plat->mmc, &plat->cfg); |
| 137 | if (ret) |
| 138 | return ret; |
| 139 | #endif |
| 140 | |
| 141 | return 0; |
| 142 | } |
| 143 | |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 144 | static const struct udevice_id socfpga_dwmmc_ids[] = { |
| 145 | { .compatible = "altr,socfpga-dw-mshc" }, |
| 146 | { } |
| 147 | }; |
Marek Vasut | 1749723 | 2015-07-25 10:48:14 +0200 | [diff] [blame] | 148 | |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 149 | U_BOOT_DRIVER(socfpga_dwmmc_drv) = { |
| 150 | .name = "socfpga_dwmmc", |
| 151 | .id = UCLASS_MMC, |
| 152 | .of_match = socfpga_dwmmc_ids, |
| 153 | .ofdata_to_platdata = socfpga_dwmmc_ofdata_to_platdata, |
Sylvain Lesne | 7083f91 | 2016-10-24 18:24:37 +0200 | [diff] [blame] | 154 | .ops = &dm_dwmci_ops, |
Simon Glass | a3a4320 | 2016-07-05 17:10:16 -0600 | [diff] [blame] | 155 | .bind = socfpga_dwmmc_bind, |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 156 | .probe = socfpga_dwmmc_probe, |
| 157 | .priv_auto_alloc_size = sizeof(struct dwmci_socfpga_priv_data), |
Sylvain Lesne | 7083f91 | 2016-10-24 18:24:37 +0200 | [diff] [blame] | 158 | .platdata_auto_alloc_size = sizeof(struct socfpga_dwmci_plat), |
Marek Vasut | ae66f3c | 2015-11-30 20:41:04 +0100 | [diff] [blame] | 159 | }; |