Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2013 ADVANSEE |
| 3 | * Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
| 4 | * |
| 5 | * Based on Dirk Behme's |
| 6 | * https://github.com/dirkbehme/u-boot-imx6/blob/28b17e9/drivers/misc/imx_otp.c, |
| 7 | * which is based on Freescale's |
| 8 | * http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/drivers/misc/imx_otp.c?h=imx_v2009.08_1.1.0&id=9aa74e6, |
| 9 | * which is: |
| 10 | * Copyright (C) 2011 Freescale Semiconductor, Inc. |
| 11 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 12 | * SPDX-License-Identifier: GPL-2.0+ |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | #include <common.h> |
| 16 | #include <fuse.h> |
Masahiro Yamada | 56a931c | 2016-09-21 11:28:55 +0900 | [diff] [blame] | 17 | #include <linux/errno.h> |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 18 | #include <asm/io.h> |
| 19 | #include <asm/arch/clock.h> |
| 20 | #include <asm/arch/imx-regs.h> |
Stefano Babic | 33731bc | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 21 | #include <asm/mach-imx/sys_proto.h> |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 22 | |
| 23 | #define BO_CTRL_WR_UNLOCK 16 |
| 24 | #define BM_CTRL_WR_UNLOCK 0xffff0000 |
| 25 | #define BV_CTRL_WR_UNLOCK_KEY 0x3e77 |
| 26 | #define BM_CTRL_ERROR 0x00000200 |
| 27 | #define BM_CTRL_BUSY 0x00000100 |
| 28 | #define BO_CTRL_ADDR 0 |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 29 | #ifdef CONFIG_MX7 |
| 30 | #define BM_CTRL_ADDR 0x0000000f |
| 31 | #define BM_CTRL_RELOAD 0x00000400 |
Peng Fan | 98c5782 | 2017-02-22 16:21:46 +0800 | [diff] [blame] | 32 | #elif defined(CONFIG_MX7ULP) |
| 33 | #define BM_CTRL_ADDR 0x000000FF |
| 34 | #define BM_CTRL_RELOAD 0x00000400 |
| 35 | #define BM_OUT_STATUS_DED 0x00000400 |
| 36 | #define BM_OUT_STATUS_LOCKED 0x00000800 |
| 37 | #define BM_OUT_STATUS_PROGFAIL 0x00001000 |
Peng Fan | 716d496 | 2018-01-10 13:20:39 +0800 | [diff] [blame] | 38 | #elif defined(CONFIG_MX8M) |
| 39 | #define BM_CTRL_ADDR 0x000000ff |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 40 | #else |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 41 | #define BM_CTRL_ADDR 0x0000007f |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 42 | #endif |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 43 | |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 44 | #ifdef CONFIG_MX7 |
| 45 | #define BO_TIMING_FSOURCE 12 |
| 46 | #define BM_TIMING_FSOURCE 0x0007f000 |
| 47 | #define BV_TIMING_FSOURCE_NS 1001 |
| 48 | #define BO_TIMING_PROG 0 |
| 49 | #define BM_TIMING_PROG 0x00000fff |
| 50 | #define BV_TIMING_PROG_US 10 |
| 51 | #else |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 52 | #define BO_TIMING_STROBE_READ 16 |
| 53 | #define BM_TIMING_STROBE_READ 0x003f0000 |
| 54 | #define BV_TIMING_STROBE_READ_NS 37 |
| 55 | #define BO_TIMING_RELAX 12 |
| 56 | #define BM_TIMING_RELAX 0x0000f000 |
| 57 | #define BV_TIMING_RELAX_NS 17 |
| 58 | #define BO_TIMING_STROBE_PROG 0 |
| 59 | #define BM_TIMING_STROBE_PROG 0x00000fff |
| 60 | #define BV_TIMING_STROBE_PROG_US 10 |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 61 | #endif |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 62 | |
| 63 | #define BM_READ_CTRL_READ_FUSE 0x00000001 |
| 64 | |
| 65 | #define BF(value, field) (((value) << BO_##field) & BM_##field) |
| 66 | |
| 67 | #define WRITE_POSTAMBLE_US 2 |
| 68 | |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 69 | #if defined(CONFIG_MX6) || defined(CONFIG_VF610) |
| 70 | #define FUSE_BANK_SIZE 0x80 |
| 71 | #ifdef CONFIG_MX6SL |
| 72 | #define FUSE_BANKS 8 |
Peng Fan | a2c2f6c | 2016-12-11 19:24:33 +0800 | [diff] [blame] | 73 | #elif defined(CONFIG_MX6ULL) || defined(CONFIG_MX6SLL) |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 74 | #define FUSE_BANKS 9 |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 75 | #else |
| 76 | #define FUSE_BANKS 16 |
| 77 | #endif |
| 78 | #elif defined CONFIG_MX7 |
| 79 | #define FUSE_BANK_SIZE 0x40 |
| 80 | #define FUSE_BANKS 16 |
Peng Fan | 98c5782 | 2017-02-22 16:21:46 +0800 | [diff] [blame] | 81 | #elif defined(CONFIG_MX7ULP) |
| 82 | #define FUSE_BANK_SIZE 0x80 |
| 83 | #define FUSE_BANKS 31 |
Peng Fan | 716d496 | 2018-01-10 13:20:39 +0800 | [diff] [blame] | 84 | #elif defined(CONFIG_MX8M) |
| 85 | #define FUSE_BANK_SIZE 0x40 |
| 86 | #define FUSE_BANKS 64 |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 87 | #else |
| 88 | #error "Unsupported architecture\n" |
| 89 | #endif |
| 90 | |
| 91 | #if defined(CONFIG_MX6) |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 92 | |
| 93 | /* |
| 94 | * There is a hole in shadow registers address map of size 0x100 |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 95 | * between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX, |
Peng Fan | a2c2f6c | 2016-12-11 19:24:33 +0800 | [diff] [blame] | 96 | * iMX6UL, i.MX6ULL and i.MX6SLL. |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 97 | * Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, |
| 98 | * we should account for this hole in address space. |
| 99 | * |
| 100 | * Similar hole exists between bank 14 and bank 15 of size |
| 101 | * 0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX. |
| 102 | * Note: iMX6SL has only 0-7 banks and there is no hole. |
| 103 | * Note: iMX6UL doesn't have this one. |
| 104 | * |
| 105 | * This function is to covert user input to physical bank index. |
| 106 | * Only needed when read fuse, because we use register offset, so |
| 107 | * need to calculate real register offset. |
| 108 | * When write, no need to consider hole, always use the bank/word |
| 109 | * index from fuse map. |
| 110 | */ |
| 111 | u32 fuse_bank_physical(int index) |
| 112 | { |
| 113 | u32 phy_index; |
| 114 | |
Peng Fan | 98c5782 | 2017-02-22 16:21:46 +0800 | [diff] [blame] | 115 | if (is_mx6sl() || is_mx7ulp()) { |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 116 | phy_index = index; |
Peng Fan | a2c2f6c | 2016-12-11 19:24:33 +0800 | [diff] [blame] | 117 | } else if (is_mx6ul() || is_mx6ull() || is_mx6sll()) { |
| 118 | if ((is_mx6ull() || is_mx6sll()) && index == 8) |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 119 | index = 7; |
| 120 | |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 121 | if (index >= 6) |
| 122 | phy_index = fuse_bank_physical(5) + (index - 6) + 3; |
| 123 | else |
| 124 | phy_index = index; |
| 125 | } else { |
| 126 | if (index >= 15) |
| 127 | phy_index = fuse_bank_physical(14) + (index - 15) + 2; |
| 128 | else if (index >= 6) |
| 129 | phy_index = fuse_bank_physical(5) + (index - 6) + 3; |
| 130 | else |
| 131 | phy_index = index; |
| 132 | } |
| 133 | return phy_index; |
| 134 | } |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 135 | |
| 136 | u32 fuse_word_physical(u32 bank, u32 word_index) |
| 137 | { |
Peng Fan | a2c2f6c | 2016-12-11 19:24:33 +0800 | [diff] [blame] | 138 | if (is_mx6ull() || is_mx6sll()) { |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 139 | if (bank == 8) |
| 140 | word_index = word_index + 4; |
| 141 | } |
| 142 | |
| 143 | return word_index; |
| 144 | } |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 145 | #else |
| 146 | u32 fuse_bank_physical(int index) |
| 147 | { |
| 148 | return index; |
| 149 | } |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 150 | |
| 151 | u32 fuse_word_physical(u32 bank, u32 word_index) |
| 152 | { |
| 153 | return word_index; |
| 154 | } |
| 155 | |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 156 | #endif |
| 157 | |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 158 | static void wait_busy(struct ocotp_regs *regs, unsigned int delay_us) |
| 159 | { |
| 160 | while (readl(®s->ctrl) & BM_CTRL_BUSY) |
| 161 | udelay(delay_us); |
| 162 | } |
| 163 | |
| 164 | static void clear_error(struct ocotp_regs *regs) |
| 165 | { |
| 166 | writel(BM_CTRL_ERROR, ®s->ctrl_clr); |
| 167 | } |
| 168 | |
| 169 | static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word, |
| 170 | int assert, const char *caller) |
| 171 | { |
| 172 | *regs = (struct ocotp_regs *)OCOTP_BASE_ADDR; |
| 173 | |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 174 | if (bank >= FUSE_BANKS || |
| 175 | word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 2 || |
| 176 | !assert) { |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 177 | printf("mxc_ocotp %s(): Invalid argument\n", caller); |
| 178 | return -EINVAL; |
| 179 | } |
| 180 | |
Peng Fan | a2c2f6c | 2016-12-11 19:24:33 +0800 | [diff] [blame] | 181 | if (is_mx6ull() || is_mx6sll()) { |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 182 | if ((bank == 7 || bank == 8) && |
| 183 | word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 3) { |
Peng Fan | a2c2f6c | 2016-12-11 19:24:33 +0800 | [diff] [blame] | 184 | printf("mxc_ocotp %s(): Invalid argument\n", caller); |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 185 | return -EINVAL; |
| 186 | } |
| 187 | } |
| 188 | |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 189 | enable_ocotp_clk(1); |
| 190 | |
| 191 | wait_busy(*regs, 1); |
| 192 | clear_error(*regs); |
| 193 | |
| 194 | return 0; |
| 195 | } |
| 196 | |
| 197 | static int finish_access(struct ocotp_regs *regs, const char *caller) |
| 198 | { |
| 199 | u32 err; |
| 200 | |
| 201 | err = !!(readl(®s->ctrl) & BM_CTRL_ERROR); |
| 202 | clear_error(regs); |
| 203 | |
Peng Fan | 98c5782 | 2017-02-22 16:21:46 +0800 | [diff] [blame] | 204 | #ifdef CONFIG_MX7ULP |
| 205 | /* Need to power down the OTP memory */ |
| 206 | writel(1, ®s->pdn); |
| 207 | #endif |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 208 | if (err) { |
| 209 | printf("mxc_ocotp %s(): Access protect error\n", caller); |
| 210 | return -EIO; |
| 211 | } |
| 212 | |
| 213 | return 0; |
| 214 | } |
| 215 | |
| 216 | static int prepare_read(struct ocotp_regs **regs, u32 bank, u32 word, u32 *val, |
| 217 | const char *caller) |
| 218 | { |
| 219 | return prepare_access(regs, bank, word, val != NULL, caller); |
| 220 | } |
| 221 | |
| 222 | int fuse_read(u32 bank, u32 word, u32 *val) |
| 223 | { |
| 224 | struct ocotp_regs *regs; |
| 225 | int ret; |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 226 | u32 phy_bank; |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 227 | u32 phy_word; |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 228 | |
| 229 | ret = prepare_read(®s, bank, word, val, __func__); |
| 230 | if (ret) |
| 231 | return ret; |
| 232 | |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 233 | phy_bank = fuse_bank_physical(bank); |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 234 | phy_word = fuse_word_physical(bank, word); |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 235 | |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 236 | *val = readl(®s->bank[phy_bank].fuse_regs[phy_word << 2]); |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 237 | |
Peng Fan | 98c5782 | 2017-02-22 16:21:46 +0800 | [diff] [blame] | 238 | #ifdef CONFIG_MX7ULP |
| 239 | if (readl(®s->out_status) & BM_OUT_STATUS_DED) { |
| 240 | writel(BM_OUT_STATUS_DED, ®s->out_status_clr); |
| 241 | printf("mxc_ocotp %s(): fuse read wrong\n", __func__); |
| 242 | return -EIO; |
| 243 | } |
| 244 | #endif |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 245 | return finish_access(regs, __func__); |
| 246 | } |
| 247 | |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 248 | #ifdef CONFIG_MX7 |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 249 | static void set_timing(struct ocotp_regs *regs) |
| 250 | { |
| 251 | u32 ipg_clk; |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 252 | u32 fsource, prog; |
| 253 | u32 timing; |
| 254 | |
| 255 | ipg_clk = mxc_get_clock(MXC_IPG_CLK); |
| 256 | |
| 257 | fsource = DIV_ROUND_UP((ipg_clk / 1000) * BV_TIMING_FSOURCE_NS, |
| 258 | + 1000000) + 1; |
| 259 | prog = DIV_ROUND_CLOSEST(ipg_clk * BV_TIMING_PROG_US, 1000000) + 1; |
| 260 | |
| 261 | timing = BF(fsource, TIMING_FSOURCE) | BF(prog, TIMING_PROG); |
| 262 | |
| 263 | clrsetbits_le32(®s->timing, BM_TIMING_FSOURCE | BM_TIMING_PROG, |
| 264 | timing); |
| 265 | } |
Peng Fan | 98c5782 | 2017-02-22 16:21:46 +0800 | [diff] [blame] | 266 | #elif defined(CONFIG_MX7ULP) |
| 267 | static void set_timing(struct ocotp_regs *regs) |
| 268 | { |
| 269 | /* No timing set for MX7ULP */ |
| 270 | } |
| 271 | |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 272 | #else |
| 273 | static void set_timing(struct ocotp_regs *regs) |
| 274 | { |
| 275 | u32 ipg_clk; |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 276 | u32 relax, strobe_read, strobe_prog; |
| 277 | u32 timing; |
| 278 | |
| 279 | ipg_clk = mxc_get_clock(MXC_IPG_CLK); |
| 280 | |
| 281 | relax = DIV_ROUND_UP(ipg_clk * BV_TIMING_RELAX_NS, 1000000000) - 1; |
| 282 | strobe_read = DIV_ROUND_UP(ipg_clk * BV_TIMING_STROBE_READ_NS, |
| 283 | 1000000000) + 2 * (relax + 1) - 1; |
Masahiro Yamada | eff8e68 | 2014-11-07 03:03:26 +0900 | [diff] [blame] | 284 | strobe_prog = DIV_ROUND_CLOSEST(ipg_clk * BV_TIMING_STROBE_PROG_US, |
| 285 | 1000000) + 2 * (relax + 1) - 1; |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 286 | |
| 287 | timing = BF(strobe_read, TIMING_STROBE_READ) | |
| 288 | BF(relax, TIMING_RELAX) | |
| 289 | BF(strobe_prog, TIMING_STROBE_PROG); |
| 290 | |
| 291 | clrsetbits_le32(®s->timing, BM_TIMING_STROBE_READ | BM_TIMING_RELAX | |
| 292 | BM_TIMING_STROBE_PROG, timing); |
| 293 | } |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 294 | #endif |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 295 | |
| 296 | static void setup_direct_access(struct ocotp_regs *regs, u32 bank, u32 word, |
| 297 | int write) |
| 298 | { |
| 299 | u32 wr_unlock = write ? BV_CTRL_WR_UNLOCK_KEY : 0; |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 300 | #ifdef CONFIG_MX7 |
| 301 | u32 addr = bank; |
Peng Fan | 716d496 | 2018-01-10 13:20:39 +0800 | [diff] [blame] | 302 | #elif defined CONFIG_MX8M |
| 303 | u32 addr = bank << 2 | word; |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 304 | #else |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 305 | u32 addr; |
| 306 | /* Bank 7 and Bank 8 only supports 4 words each for i.MX6ULL */ |
Peng Fan | a2c2f6c | 2016-12-11 19:24:33 +0800 | [diff] [blame] | 307 | if ((is_mx6ull() || is_mx6sll()) && (bank > 7)) { |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 308 | bank = bank - 1; |
| 309 | word += 4; |
| 310 | } |
| 311 | addr = bank << 3 | word; |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 312 | #endif |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 313 | |
| 314 | set_timing(regs); |
| 315 | clrsetbits_le32(®s->ctrl, BM_CTRL_WR_UNLOCK | BM_CTRL_ADDR, |
| 316 | BF(wr_unlock, CTRL_WR_UNLOCK) | |
| 317 | BF(addr, CTRL_ADDR)); |
| 318 | } |
| 319 | |
| 320 | int fuse_sense(u32 bank, u32 word, u32 *val) |
| 321 | { |
| 322 | struct ocotp_regs *regs; |
| 323 | int ret; |
| 324 | |
| 325 | ret = prepare_read(®s, bank, word, val, __func__); |
| 326 | if (ret) |
| 327 | return ret; |
| 328 | |
| 329 | setup_direct_access(regs, bank, word, false); |
| 330 | writel(BM_READ_CTRL_READ_FUSE, ®s->read_ctrl); |
| 331 | wait_busy(regs, 1); |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 332 | #ifdef CONFIG_MX7 |
| 333 | *val = readl((®s->read_fuse_data0) + (word << 2)); |
| 334 | #else |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 335 | *val = readl(®s->read_fuse_data); |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 336 | #endif |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 337 | |
Peng Fan | 98c5782 | 2017-02-22 16:21:46 +0800 | [diff] [blame] | 338 | #ifdef CONFIG_MX7ULP |
| 339 | if (readl(®s->out_status) & BM_OUT_STATUS_DED) { |
| 340 | writel(BM_OUT_STATUS_DED, ®s->out_status_clr); |
| 341 | printf("mxc_ocotp %s(): fuse read wrong\n", __func__); |
| 342 | return -EIO; |
| 343 | } |
| 344 | #endif |
| 345 | |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 346 | return finish_access(regs, __func__); |
| 347 | } |
| 348 | |
| 349 | static int prepare_write(struct ocotp_regs **regs, u32 bank, u32 word, |
| 350 | const char *caller) |
| 351 | { |
Peng Fan | 235ba33 | 2018-01-02 15:51:20 +0800 | [diff] [blame] | 352 | #ifdef CONFIG_MX7ULP |
| 353 | u32 val; |
| 354 | int ret; |
| 355 | |
| 356 | /* Only bank 0 and 1 are redundancy mode, others are ECC mode */ |
| 357 | if (bank != 0 && bank != 1) { |
| 358 | ret = fuse_sense(bank, word, &val); |
| 359 | if (ret) |
| 360 | return ret; |
| 361 | |
| 362 | if (val != 0) { |
| 363 | printf("mxc_ocotp: The word has been programmed, no more write\n"); |
| 364 | return -EPERM; |
| 365 | } |
| 366 | } |
| 367 | #endif |
| 368 | |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 369 | return prepare_access(regs, bank, word, true, caller); |
| 370 | } |
| 371 | |
| 372 | int fuse_prog(u32 bank, u32 word, u32 val) |
| 373 | { |
| 374 | struct ocotp_regs *regs; |
| 375 | int ret; |
| 376 | |
| 377 | ret = prepare_write(®s, bank, word, __func__); |
| 378 | if (ret) |
| 379 | return ret; |
| 380 | |
| 381 | setup_direct_access(regs, bank, word, true); |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 382 | #ifdef CONFIG_MX7 |
| 383 | switch (word) { |
| 384 | case 0: |
| 385 | writel(0, ®s->data1); |
| 386 | writel(0, ®s->data2); |
| 387 | writel(0, ®s->data3); |
| 388 | writel(val, ®s->data0); |
| 389 | break; |
| 390 | case 1: |
| 391 | writel(val, ®s->data1); |
| 392 | writel(0, ®s->data2); |
| 393 | writel(0, ®s->data3); |
| 394 | writel(0, ®s->data0); |
| 395 | break; |
| 396 | case 2: |
| 397 | writel(0, ®s->data1); |
| 398 | writel(val, ®s->data2); |
| 399 | writel(0, ®s->data3); |
| 400 | writel(0, ®s->data0); |
| 401 | break; |
| 402 | case 3: |
| 403 | writel(0, ®s->data1); |
| 404 | writel(0, ®s->data2); |
| 405 | writel(val, ®s->data3); |
| 406 | writel(0, ®s->data0); |
| 407 | break; |
| 408 | } |
| 409 | wait_busy(regs, BV_TIMING_PROG_US); |
| 410 | #else |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 411 | writel(val, ®s->data); |
| 412 | wait_busy(regs, BV_TIMING_STROBE_PROG_US); |
Adrian Alonso | 57b0013 | 2015-08-11 11:19:52 -0500 | [diff] [blame] | 413 | #endif |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 414 | udelay(WRITE_POSTAMBLE_US); |
| 415 | |
Peng Fan | 98c5782 | 2017-02-22 16:21:46 +0800 | [diff] [blame] | 416 | #ifdef CONFIG_MX7ULP |
| 417 | if (readl(®s->out_status) & (BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED)) { |
| 418 | writel((BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED), ®s->out_status_clr); |
| 419 | printf("mxc_ocotp %s(): fuse write is failed\n", __func__); |
| 420 | return -EIO; |
| 421 | } |
| 422 | #endif |
| 423 | |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 424 | return finish_access(regs, __func__); |
| 425 | } |
| 426 | |
| 427 | int fuse_override(u32 bank, u32 word, u32 val) |
| 428 | { |
| 429 | struct ocotp_regs *regs; |
| 430 | int ret; |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 431 | u32 phy_bank; |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 432 | u32 phy_word; |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 433 | |
| 434 | ret = prepare_write(®s, bank, word, __func__); |
| 435 | if (ret) |
| 436 | return ret; |
| 437 | |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 438 | phy_bank = fuse_bank_physical(bank); |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 439 | phy_word = fuse_word_physical(bank, word); |
Peng Fan | 52bae46 | 2015-08-26 15:40:47 +0800 | [diff] [blame] | 440 | |
Peng Fan | cb356f9 | 2016-08-11 14:02:41 +0800 | [diff] [blame] | 441 | writel(val, ®s->bank[phy_bank].fuse_regs[phy_word << 2]); |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 442 | |
Peng Fan | 98c5782 | 2017-02-22 16:21:46 +0800 | [diff] [blame] | 443 | #ifdef CONFIG_MX7ULP |
| 444 | if (readl(®s->out_status) & (BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED)) { |
| 445 | writel((BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED), ®s->out_status_clr); |
| 446 | printf("mxc_ocotp %s(): fuse write is failed\n", __func__); |
| 447 | return -EIO; |
| 448 | } |
| 449 | #endif |
| 450 | |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 451 | return finish_access(regs, __func__); |
| 452 | } |