blob: a72a85ef9c4242b0079c5b556671d5bfa332aa6b [file] [log] [blame]
Simon Glass5f8865f2015-03-02 12:40:54 -07001/dts-v1/;
2
3/include/ "skeleton.dtsi"
4/include/ "serial.dtsi"
Bin Mengaf5b8d22018-07-19 03:07:33 -07005/include/ "reset.dtsi"
Bin Meng770fd332015-07-15 16:23:39 +08006/include/ "rtc.dtsi"
Bin Meng38de0202015-11-13 00:11:22 -08007/include/ "tsc_timer.dtsi"
Bin Menga4470172016-10-09 04:14:18 -07008/include/ "coreboot_fb.dtsi"
Simon Glass5f8865f2015-03-02 12:40:54 -07009
10/ {
11 model = "Google Panther";
12 compatible = "google,panther", "intel,haswell";
13
14 aliases {
Bin Meng4f8d4e92016-01-27 00:56:34 -080015 spi0 = &spi;
Simon Glass5f8865f2015-03-02 12:40:54 -070016 };
17
18 config {
19 silent-console = <0>;
20 no-keyboard;
21 };
22
Simon Glass5f8865f2015-03-02 12:40:54 -070023 chosen {
24 stdout-path = "/serial";
25 };
26
Simon Glassa1a969e2015-08-27 19:54:48 -060027 pci {
28 compatible = "pci-x86";
29 #address-cells = <3>;
30 #size-cells = <2>;
31 u-boot,dm-pre-reloc;
32 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
33 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
34 0x01000000 0x0 0x1000 0x1000 0 0xf000>;
Simon Glass32761632016-01-18 20:19:21 -070035
36 pch@1f,0 {
37 reg = <0x0000f800 0 0 0 0>;
38 compatible = "intel,pch9";
Bin Meng6e916cc2016-02-01 01:40:47 -080039 #address-cells = <1>;
40 #size-cells = <1>;
Simon Glassa1a969e2015-08-27 19:54:48 -060041
Bin Meng4f8d4e92016-01-27 00:56:34 -080042 spi: spi {
Simon Glass32761632016-01-18 20:19:21 -070043 #address-cells = <1>;
44 #size-cells = <0>;
Bin Mengd9406672016-02-01 01:40:37 -080045 compatible = "intel,ich9-spi";
Simon Glass32761632016-01-18 20:19:21 -070046 spi-flash@0 {
47 #size-cells = <1>;
48 #address-cells = <1>;
49 reg = <0>;
50 compatible = "winbond,w25q64",
51 "spi-flash";
52 memory-map = <0xff800000 0x00800000>;
53 rw-mrc-cache {
54 label = "rw-mrc-cache";
55 reg = <0x003e0000 0x00010000>;
56 };
57 };
Simon Glass5f8865f2015-03-02 12:40:54 -070058 };
Bin Meng6e916cc2016-02-01 01:40:47 -080059
60 gpioa {
61 compatible = "intel,ich6-gpio";
62 u-boot,dm-pre-reloc;
63 reg = <0 0x10>;
64 bank-name = "A";
65 };
66
67 gpiob {
68 compatible = "intel,ich6-gpio";
69 u-boot,dm-pre-reloc;
70 reg = <0x30 0x10>;
71 bank-name = "B";
72 };
73
74 gpioc {
75 compatible = "intel,ich6-gpio";
76 u-boot,dm-pre-reloc;
77 reg = <0x40 0x10>;
78 bank-name = "C";
79 };
Simon Glass5f8865f2015-03-02 12:40:54 -070080 };
81 };
82
Simon Glass11328532015-08-22 18:31:37 -060083 tpm {
84 reg = <0xfed40000 0x5000>;
85 compatible = "infineon,slb9635lpc";
86 };
87
Simon Glass5f8865f2015-03-02 12:40:54 -070088};