blob: ce8825fc879f83645b3da61af422c9239ee27c7a [file] [log] [blame]
Simon Glass5f8865f2015-03-02 12:40:54 -07001/dts-v1/;
2
3/include/ "skeleton.dtsi"
4/include/ "serial.dtsi"
Bin Meng770fd332015-07-15 16:23:39 +08005/include/ "rtc.dtsi"
Bin Meng38de0202015-11-13 00:11:22 -08006/include/ "tsc_timer.dtsi"
Simon Glass5f8865f2015-03-02 12:40:54 -07007
8/ {
9 model = "Google Panther";
10 compatible = "google,panther", "intel,haswell";
11
12 aliases {
Bin Meng4f8d4e92016-01-27 00:56:34 -080013 spi0 = &spi;
Simon Glass5f8865f2015-03-02 12:40:54 -070014 };
15
16 config {
17 silent-console = <0>;
18 no-keyboard;
19 };
20
21 gpioa {
22 compatible = "intel,ich6-gpio";
23 u-boot,dm-pre-reloc;
24 reg = <0 0x10>;
25 bank-name = "A";
26 };
27
28 gpiob {
29 compatible = "intel,ich6-gpio";
30 u-boot,dm-pre-reloc;
31 reg = <0x30 0x10>;
32 bank-name = "B";
33 };
34
35 gpioc {
36 compatible = "intel,ich6-gpio";
37 u-boot,dm-pre-reloc;
38 reg = <0x40 0x10>;
39 bank-name = "C";
40 };
41
42 chosen {
43 stdout-path = "/serial";
44 };
45
Simon Glassa1a969e2015-08-27 19:54:48 -060046 pci {
47 compatible = "pci-x86";
48 #address-cells = <3>;
49 #size-cells = <2>;
50 u-boot,dm-pre-reloc;
51 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
52 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
53 0x01000000 0x0 0x1000 0x1000 0 0xf000>;
Simon Glass32761632016-01-18 20:19:21 -070054
55 pch@1f,0 {
56 reg = <0x0000f800 0 0 0 0>;
57 compatible = "intel,pch9";
Simon Glassa1a969e2015-08-27 19:54:48 -060058
Bin Meng4f8d4e92016-01-27 00:56:34 -080059 spi: spi {
Simon Glass32761632016-01-18 20:19:21 -070060 #address-cells = <1>;
61 #size-cells = <0>;
Bin Mengd9406672016-02-01 01:40:37 -080062 compatible = "intel,ich9-spi";
Simon Glass32761632016-01-18 20:19:21 -070063 spi-flash@0 {
64 #size-cells = <1>;
65 #address-cells = <1>;
66 reg = <0>;
67 compatible = "winbond,w25q64",
68 "spi-flash";
69 memory-map = <0xff800000 0x00800000>;
70 rw-mrc-cache {
71 label = "rw-mrc-cache";
72 reg = <0x003e0000 0x00010000>;
73 };
74 };
Simon Glass5f8865f2015-03-02 12:40:54 -070075 };
76 };
77 };
78
Simon Glass11328532015-08-22 18:31:37 -060079 tpm {
80 reg = <0xfed40000 0x5000>;
81 compatible = "infineon,slb9635lpc";
82 };
83
Simon Glass5f8865f2015-03-02 12:40:54 -070084};