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Bo Shen06ce3f42014-02-09 15:52:39 +08001/*
2 * Configuration settings for the SAMA5D3 Xplained board.
3 *
4 * Copyright (C) 2014 Atmel Corporation
5 * Bo Shen <voice.shen@atmel.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
Wu, Josh42587542015-03-30 14:51:19 +080013/* No NOR flash, this definition should put before common header */
14#define CONFIG_SYS_NO_FLASH
Bo Shene69bb892014-04-24 11:42:14 +080015
Wu, Josh42587542015-03-30 14:51:19 +080016#include "at91-sama5_common.h"
Bo Shen06ce3f42014-02-09 15:52:39 +080017
18/* serial console */
19#define CONFIG_ATMEL_USART
20#define CONFIG_USART_BASE ATMEL_BASE_DBGU
21#define CONFIG_USART_ID ATMEL_ID_DBGU
22
23/*
24 * This needs to be defined for the OHCI code to work but it is defined as
25 * ATMEL_ID_UHPHS in the CPU specific header files.
26 */
27#define ATMEL_ID_UHP ATMEL_ID_UHPHS
28
29/*
30 * Specify the clock enable bit in the PMC_SCER register.
31 */
32#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
33
Bo Shen06ce3f42014-02-09 15:52:39 +080034/* SDRAM */
35#define CONFIG_NR_DRAM_BANKS 1
36#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
37#define CONFIG_SYS_SDRAM_SIZE 0x10000000
38
Bo Shen735ef1a2014-03-19 14:48:45 +080039#ifdef CONFIG_SPL_BUILD
40#define CONFIG_SYS_INIT_SP_ADDR 0x310000
41#else
Bo Shen06ce3f42014-02-09 15:52:39 +080042#define CONFIG_SYS_INIT_SP_ADDR \
43 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
Bo Shen735ef1a2014-03-19 14:48:45 +080044#endif
Bo Shen06ce3f42014-02-09 15:52:39 +080045
46/* NAND flash */
47#define CONFIG_CMD_NAND
48
49#ifdef CONFIG_CMD_NAND
50#define CONFIG_NAND_ATMEL
51#define CONFIG_SYS_MAX_NAND_DEVICE 1
52#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
53/* our ALE is AD21 */
54#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
55/* our CLE is AD22 */
56#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
57#define CONFIG_SYS_NAND_ONFI_DETECTION
58/* PMECC & PMERRLOC */
59#define CONFIG_ATMEL_NAND_HWECC
60#define CONFIG_ATMEL_NAND_HW_PMECC
61#define CONFIG_PMECC_CAP 4
62#define CONFIG_PMECC_SECTOR_SIZE 512
63#define CONFIG_CMD_NAND_TRIMFFS
64#define CONFIG_CMD_MTDPARTS
65
66#define CONFIG_MTD_DEVICE
67#define CONFIG_MTD_PARTITIONS
68#define CONFIG_RBTREE
69#define CONFIG_LZO
70#define CONFIG_CMD_UBI
71#define CONFIG_CMD_UBIFS
72#endif
73
74/* Ethernet Hardware */
75#define CONFIG_MACB
76#define CONFIG_RMII
Bo Shen06ce3f42014-02-09 15:52:39 +080077#define CONFIG_NET_RETRY_COUNT 20
78#define CONFIG_MACB_SEARCH_PHY
79#define CONFIG_RGMII
Bo Shen06ce3f42014-02-09 15:52:39 +080080#define CONFIG_PHYLIB
81
82/* MMC */
Bo Shen06ce3f42014-02-09 15:52:39 +080083
84#ifdef CONFIG_CMD_MMC
85#define CONFIG_MMC
86#define CONFIG_GENERIC_MMC
87#define CONFIG_GENERIC_ATMEL_MCI
88#define CONFIG_ATMEL_MCI_8BIT
89#endif
90
91/* USB */
Bo Shen06ce3f42014-02-09 15:52:39 +080092
93#ifdef CONFIG_CMD_USB
94#define CONFIG_USB_ATMEL
95#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
96#define CONFIG_USB_OHCI_NEW
97#define CONFIG_SYS_USB_OHCI_CPU_INIT
98#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
99#define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained"
100#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
101#define CONFIG_DOS_PARTITION
102#define CONFIG_USB_STORAGE
103#endif
104
105#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
Bo Shen06ce3f42014-02-09 15:52:39 +0800106#define CONFIG_FAT_WRITE
Bo Shen06ce3f42014-02-09 15:52:39 +0800107#endif
108
109#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
110
111#if CONFIG_SYS_USE_NANDFLASH
Wu, Josh244caf02015-08-19 19:11:20 +0800112/* override the bootcmd, bootargs and other configuration for nandflash env */
Bo Shen06ce3f42014-02-09 15:52:39 +0800113#elif CONFIG_SYS_USE_MMC
Wu, Josh8b9c7512015-08-19 19:11:18 +0800114/* override the bootcmd, bootargs and other configuration for sd/mmc env */
Bo Shen06ce3f42014-02-09 15:52:39 +0800115#else
116#define CONFIG_ENV_IS_NOWHERE
117#endif
118
Bo Shen735ef1a2014-03-19 14:48:45 +0800119/* SPL */
Bo Shen735ef1a2014-03-19 14:48:45 +0800120#define CONFIG_SPL_FRAMEWORK
121#define CONFIG_SPL_TEXT_BASE 0x300000
122#define CONFIG_SPL_MAX_SIZE 0x10000
123#define CONFIG_SPL_BSS_START_ADDR 0x20000000
124#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
125#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
126#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
127
128#define CONFIG_SPL_LIBCOMMON_SUPPORT
129#define CONFIG_SPL_LIBGENERIC_SUPPORT
130#define CONFIG_SPL_GPIO_SUPPORT
131#define CONFIG_SPL_SERIAL_SUPPORT
132
133#define CONFIG_SPL_BOARD_INIT
134#define CONFIG_SYS_MONITOR_LEN (512 << 10)
135
136#ifdef CONFIG_SYS_USE_MMC
Bo Shen83a718d2015-03-04 13:32:57 +0800137#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
Bo Shen735ef1a2014-03-19 14:48:45 +0800138#define CONFIG_SPL_MMC_SUPPORT
139#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
140#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
Paul Kocialkowski341e8cd2014-11-08 23:14:55 +0100141#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200142#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shen735ef1a2014-03-19 14:48:45 +0800143#define CONFIG_SPL_FAT_SUPPORT
144#define CONFIG_SPL_LIBDISK_SUPPORT
145
146#elif CONFIG_SYS_USE_NANDFLASH
147#define CONFIG_SPL_NAND_SUPPORT
148#define CONFIG_SPL_NAND_DRIVERS
149#define CONFIG_SPL_NAND_BASE
150#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
151#define CONFIG_SYS_NAND_5_ADDR_CYCLE
152#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
153#define CONFIG_SYS_NAND_PAGE_COUNT 64
154#define CONFIG_SYS_NAND_OOBSIZE 64
155#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
156#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
Wu, Josh94b68b02014-11-19 19:03:00 +0800157#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
Bo Shen735ef1a2014-03-19 14:48:45 +0800158
159#endif
160
Bo Shen06ce3f42014-02-09 15:52:39 +0800161#endif