Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include "k3-j721e-som-p0.dtsi" |
Praneeth Bajjuri | 1107753 | 2020-12-03 17:43:47 -0600 | [diff] [blame] | 9 | #include "k3-j721e-ddr-evm-lp4-4266.dtsi" |
Lokesh Vutla | 430a0b3 | 2019-10-07 19:26:37 +0530 | [diff] [blame] | 10 | #include "k3-j721e-ddr.dtsi" |
Aswath Govindraju | dcfb97e | 2022-01-28 13:41:39 +0530 | [diff] [blame] | 11 | #include <dt-bindings/phy/phy-cadence.h> |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 12 | |
| 13 | / { |
| 14 | aliases { |
| 15 | remoteproc0 = &sysctrler; |
| 16 | remoteproc1 = &a72_0; |
| 17 | }; |
| 18 | |
| 19 | chosen { |
| 20 | stdout-path = "serial2:115200n8"; |
| 21 | tick-timer = &timer1; |
| 22 | }; |
| 23 | |
| 24 | a72_0: a72@0 { |
| 25 | compatible = "ti,am654-rproc"; |
| 26 | reg = <0x0 0x00a90000 0x0 0x10>; |
| 27 | power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, |
| 28 | <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>; |
| 29 | resets = <&k3_reset 202 0>; |
Nishanth Menon | 975b78c | 2021-01-06 13:20:31 -0600 | [diff] [blame] | 30 | clocks = <&k3_clks 61 1>; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 31 | assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>; |
| 32 | assigned-clock-rates = <2000000000>, <200000000>; |
| 33 | ti,sci = <&dmsc>; |
| 34 | ti,sci-proc-id = <32>; |
| 35 | ti,sci-host-id = <10>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 36 | bootph-pre-ram; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 37 | }; |
| 38 | |
Faiz Abbas | 6f08b48 | 2020-02-26 13:44:37 +0530 | [diff] [blame] | 39 | clk_200mhz: dummy_clock_200mhz { |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 40 | compatible = "fixed-clock"; |
| 41 | #clock-cells = <0>; |
| 42 | clock-frequency = <200000000>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 43 | bootph-pre-ram; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 44 | }; |
Vignesh Raghavendra | 4bdd330 | 2020-01-27 17:59:25 +0530 | [diff] [blame] | 45 | |
Faiz Abbas | 6f08b48 | 2020-02-26 13:44:37 +0530 | [diff] [blame] | 46 | clk_19_2mhz: dummy_clock_19_2mhz { |
Vignesh Raghavendra | 4bdd330 | 2020-01-27 17:59:25 +0530 | [diff] [blame] | 47 | compatible = "fixed-clock"; |
| 48 | #clock-cells = <0>; |
| 49 | clock-frequency = <19200000>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 50 | bootph-pre-ram; |
Vignesh Raghavendra | 4bdd330 | 2020-01-27 17:59:25 +0530 | [diff] [blame] | 51 | }; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 52 | }; |
| 53 | |
| 54 | &cbass_mcu_wakeup { |
| 55 | mcu_secproxy: secproxy@28380000 { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 56 | bootph-pre-ram; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 57 | compatible = "ti,am654-secure-proxy"; |
| 58 | reg = <0x0 0x2a380000 0x0 0x80000>, |
| 59 | <0x0 0x2a400000 0x0 0x80000>, |
| 60 | <0x0 0x2a480000 0x0 0x80000>; |
| 61 | reg-names = "rt", "scfg", "target_data"; |
| 62 | #mbox-cells = <1>; |
| 63 | }; |
| 64 | |
| 65 | sysctrler: sysctrler { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 66 | bootph-pre-ram; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 67 | compatible = "ti,am654-system-controller"; |
| 68 | mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; |
| 69 | mbox-names = "tx", "rx"; |
| 70 | }; |
Keerthy | be86d32 | 2019-10-24 15:00:58 +0530 | [diff] [blame] | 71 | |
| 72 | wkup_vtm0: wkup_vtm@42040000 { |
| 73 | compatible = "ti,am654-vtm", "ti,j721e-avs"; |
| 74 | reg = <0x0 0x42040000 0x0 0x330>; |
| 75 | power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; |
| 76 | #thermal-sensor-cells = <1>; |
| 77 | }; |
Vignesh Raghavendra | 9818197 | 2021-06-07 19:47:50 +0530 | [diff] [blame] | 78 | |
| 79 | dm_tifs: dm-tifs { |
| 80 | compatible = "ti,j721e-dm-sci"; |
| 81 | ti,host-id = <3>; |
| 82 | ti,secure-host; |
| 83 | mbox-names = "rx", "tx"; |
| 84 | mboxes= <&mcu_secproxy 21>, |
| 85 | <&mcu_secproxy 23>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 86 | bootph-pre-ram; |
Vignesh Raghavendra | 9818197 | 2021-06-07 19:47:50 +0530 | [diff] [blame] | 87 | }; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 88 | }; |
| 89 | |
Tero Kristo | 3cafcd8 | 2020-02-14 11:18:17 +0200 | [diff] [blame] | 90 | &cbass_main { |
| 91 | main_esm: esm@700000 { |
| 92 | compatible = "ti,j721e-esm"; |
| 93 | reg = <0x0 0x700000 0x0 0x1000>; |
| 94 | ti,esm-pins = <344>, <345>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 95 | bootph-pre-ram; |
Tero Kristo | 3cafcd8 | 2020-02-14 11:18:17 +0200 | [diff] [blame] | 96 | }; |
| 97 | }; |
| 98 | |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 99 | &dmsc { |
| 100 | mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>; |
| 101 | mbox-names = "tx", "rx", "notify"; |
| 102 | ti,host-id = <4>; |
| 103 | ti,secure-host; |
| 104 | }; |
| 105 | |
| 106 | &wkup_pmx0 { |
| 107 | wkup_uart0_pins_default: wkup_uart0_pins_default { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 108 | bootph-pre-ram; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 109 | pinctrl-single,pins = < |
| 110 | J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */ |
| 111 | J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */ |
| 112 | >; |
| 113 | }; |
| 114 | |
| 115 | mcu_uart0_pins_default: mcu_uart0_pins_default { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 116 | bootph-pre-ram; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 117 | pinctrl-single,pins = < |
| 118 | J721E_WKUP_IOPAD(0xe8, PIN_INPUT, 0) /* (H29) WKUP_GPIO0_14.MCU_UART0_CTSn */ |
| 119 | J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */ |
| 120 | J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */ |
| 121 | J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */ |
| 122 | >; |
| 123 | }; |
Keerthy | c6f8654 | 2019-10-24 15:00:59 +0530 | [diff] [blame] | 124 | |
| 125 | wkup_i2c0_pins_default: wkup-i2c0-pins-default { |
| 126 | pinctrl-single,pins = < |
| 127 | J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */ |
| 128 | J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */ |
| 129 | >; |
| 130 | }; |
Vignesh Raghavendra | da67437 | 2020-02-04 11:09:52 +0530 | [diff] [blame] | 131 | |
Vaishnav Achath | fb708a4 | 2022-05-09 11:50:11 +0530 | [diff] [blame] | 132 | mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default { |
| 133 | pinctrl-single,pins = < |
| 134 | J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (E20) MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */ |
| 135 | J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* (C21) MCU_OSPI0_LBCLKO.MCU_HYPERBUS0_CKn */ |
| 136 | J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* (F19) MCU_OSPI0_CSn0.MCU_HYPERBUS0_CSn0 */ |
| 137 | J721E_WKUP_IOPAD(0x54, PIN_OUTPUT, 3) /* (E22) MCU_OSPI1_CSn1.MCU_HYPERBUS0_CSn1 */ |
| 138 | J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* (E19) MCU_OSPI0_CSn1.MCU_HYPERBUS0_RESETn */ |
| 139 | J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1) /* (D21) MCU_OSPI0_DQS.MCU_HYPERBUS0_RWDS */ |
| 140 | J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1) /* (D20) MCU_OSPI0_D0.MCU_HYPERBUS0_DQ0 */ |
| 141 | J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1) /* (G19) MCU_OSPI0_D1.MCU_HYPERBUS0_DQ1 */ |
| 142 | J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1) /* (G20) MCU_OSPI0_D2.MCU_HYPERBUS0_DQ2 */ |
| 143 | J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* (F20) MCU_OSPI0_D3.MCU_HYPERBUS0_DQ3 */ |
| 144 | J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1) /* (F21) MCU_OSPI0_D4.MCU_HYPERBUS0_DQ4 */ |
| 145 | J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (E21) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */ |
| 146 | J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (B22) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */ |
| 147 | J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */ |
| 148 | >; |
| 149 | }; |
| 150 | |
| 151 | wkup_gpio_pins_default: wkup-gpio-pins-default { |
| 152 | pinctrl-single,pins = < |
| 153 | J721E_WKUP_IOPAD(0xd0, PIN_INPUT, 7) /* WKUP_GPIO0_8 */ |
| 154 | >; |
| 155 | }; |
| 156 | |
Vignesh Raghavendra | da67437 | 2020-02-04 11:09:52 +0530 | [diff] [blame] | 157 | mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { |
| 158 | pinctrl-single,pins = < |
| 159 | J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ |
| 160 | J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */ |
| 161 | J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */ |
| 162 | J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */ |
| 163 | J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */ |
| 164 | J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */ |
| 165 | J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */ |
| 166 | J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */ |
| 167 | J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */ |
| 168 | J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */ |
| 169 | J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */ |
| 170 | >; |
| 171 | }; |
Keerthy | 71156c9 | 2020-03-04 10:09:59 +0530 | [diff] [blame] | 172 | |
| 173 | mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 174 | bootph-pre-ram; |
Keerthy | 71156c9 | 2020-03-04 10:09:59 +0530 | [diff] [blame] | 175 | pinctrl-single,pins = < |
| 176 | J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ |
| 177 | J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */ |
| 178 | J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */ |
| 179 | J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */ |
| 180 | J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */ |
| 181 | J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */ |
| 182 | J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */ |
| 183 | J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */ |
| 184 | >; |
| 185 | }; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 186 | }; |
| 187 | |
| 188 | &main_pmx0 { |
| 189 | main_uart0_pins_default: main_uart0_pins_default { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 190 | bootph-pre-ram; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 191 | pinctrl-single,pins = < |
| 192 | J721E_IOPAD(0x1d4, PIN_INPUT, 1) /* (Y3) SPI1_CS0.UART0_CTSn */ |
| 193 | J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */ |
| 194 | J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */ |
| 195 | J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */ |
| 196 | >; |
| 197 | }; |
Vignesh Raghavendra | 04ed493 | 2019-11-18 19:16:35 +0530 | [diff] [blame] | 198 | |
| 199 | main_usbss0_pins_default: main_usbss0_pins_default { |
| 200 | pinctrl-single,pins = < |
| 201 | J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */ |
| 202 | J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */ |
| 203 | >; |
| 204 | }; |
Faiz Abbas | c67d389 | 2020-01-16 19:42:21 +0530 | [diff] [blame] | 205 | |
| 206 | main_mmc1_pins_default: main_mmc1_pins_default { |
| 207 | pinctrl-single,pins = < |
| 208 | J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */ |
| 209 | J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */ |
| 210 | J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */ |
| 211 | J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */ |
| 212 | J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ |
| 213 | J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */ |
| 214 | J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */ |
| 215 | J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */ |
| 216 | J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */ |
| 217 | >; |
| 218 | }; |
Vignesh Raghavendra | 8a290cc | 2020-01-27 23:22:15 +0530 | [diff] [blame] | 219 | |
| 220 | main_i2c0_pins_default: main-i2c0-pins-default { |
| 221 | pinctrl-single,pins = < |
| 222 | J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */ |
| 223 | J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */ |
| 224 | >; |
| 225 | }; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 226 | }; |
| 227 | |
| 228 | &wkup_uart0 { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 229 | bootph-pre-ram; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 230 | pinctrl-names = "default"; |
| 231 | pinctrl-0 = <&wkup_uart0_pins_default>; |
| 232 | status = "okay"; |
| 233 | }; |
| 234 | |
Vaishnav Achath | fb708a4 | 2022-05-09 11:50:11 +0530 | [diff] [blame] | 235 | &wkup_gpio0 { |
| 236 | pinctrl-names = "default"; |
| 237 | pinctrl-0 = <&wkup_gpio_pins_default>; |
| 238 | }; |
| 239 | |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 240 | &mcu_uart0 { |
Lokesh Vutla | bad3d41 | 2020-02-03 19:16:53 +0530 | [diff] [blame] | 241 | /delete-property/ power-domains; |
| 242 | /delete-property/ clocks; |
| 243 | /delete-property/ clock-names; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 244 | pinctrl-names = "default"; |
| 245 | pinctrl-0 = <&mcu_uart0_pins_default>; |
| 246 | status = "okay"; |
Lokesh Vutla | bad3d41 | 2020-02-03 19:16:53 +0530 | [diff] [blame] | 247 | clock-frequency = <48000000>; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 248 | }; |
| 249 | |
| 250 | &main_uart0 { |
| 251 | pinctrl-names = "default"; |
| 252 | pinctrl-0 = <&main_uart0_pins_default>; |
| 253 | status = "okay"; |
| 254 | power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; |
| 255 | }; |
| 256 | |
| 257 | &main_sdhci0 { |
| 258 | /delete-property/ power-domains; |
| 259 | /delete-property/ assigned-clocks; |
| 260 | /delete-property/ assigned-clock-parents; |
| 261 | clock-names = "clk_xin"; |
| 262 | clocks = <&clk_200mhz>; |
| 263 | ti,driver-strength-ohm = <50>; |
| 264 | non-removable; |
| 265 | bus-width = <8>; |
| 266 | }; |
| 267 | |
| 268 | &main_sdhci1 { |
| 269 | /delete-property/ power-domains; |
| 270 | /delete-property/ assigned-clocks; |
| 271 | /delete-property/ assigned-clock-parents; |
Faiz Abbas | c67d389 | 2020-01-16 19:42:21 +0530 | [diff] [blame] | 272 | pinctrl-names = "default"; |
| 273 | pinctrl-0 = <&main_mmc1_pins_default>; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 274 | clock-names = "clk_xin"; |
| 275 | clocks = <&clk_200mhz>; |
| 276 | ti,driver-strength-ohm = <50>; |
| 277 | }; |
| 278 | |
Keerthy | c6f8654 | 2019-10-24 15:00:59 +0530 | [diff] [blame] | 279 | &wkup_i2c0 { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 280 | bootph-pre-ram; |
Keerthy | c6f8654 | 2019-10-24 15:00:59 +0530 | [diff] [blame] | 281 | tps659413a: tps659413a@48 { |
| 282 | reg = <0x48>; |
| 283 | compatible = "ti,tps659413"; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 284 | bootph-pre-ram; |
Keerthy | c6f8654 | 2019-10-24 15:00:59 +0530 | [diff] [blame] | 285 | pinctrl-names = "default"; |
| 286 | pinctrl-0 = <&wkup_i2c0_pins_default>; |
| 287 | clock-frequency = <400000>; |
| 288 | |
| 289 | regulators: regulators { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 290 | bootph-pre-ram; |
Keerthy | c6f8654 | 2019-10-24 15:00:59 +0530 | [diff] [blame] | 291 | buck12_reg: buck12 { |
Keerthy | ac20ebd | 2022-02-10 09:25:58 +0530 | [diff] [blame] | 292 | /*VDD_CPU*/ |
Keerthy | c6f8654 | 2019-10-24 15:00:59 +0530 | [diff] [blame] | 293 | regulator-name = "buck12"; |
Keerthy | ac20ebd | 2022-02-10 09:25:58 +0530 | [diff] [blame] | 294 | regulator-min-microvolt = <600000>; |
| 295 | regulator-max-microvolt = <900000>; |
Keerthy | c6f8654 | 2019-10-24 15:00:59 +0530 | [diff] [blame] | 296 | regulator-always-on; |
| 297 | regulator-boot-on; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 298 | bootph-pre-ram; |
Keerthy | c6f8654 | 2019-10-24 15:00:59 +0530 | [diff] [blame] | 299 | }; |
| 300 | }; |
| 301 | }; |
| 302 | }; |
| 303 | |
Keerthy | 7c9fa30 | 2019-10-24 15:01:00 +0530 | [diff] [blame] | 304 | &wkup_vtm0 { |
| 305 | vdd-supply-2 = <&buck12_reg>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 306 | bootph-pre-ram; |
Keerthy | 7c9fa30 | 2019-10-24 15:01:00 +0530 | [diff] [blame] | 307 | }; |
| 308 | |
Vignesh Raghavendra | 4bdd330 | 2020-01-27 17:59:25 +0530 | [diff] [blame] | 309 | &usbss0 { |
| 310 | /delete-property/ power-domains; |
| 311 | /delete-property/ assigned-clocks; |
| 312 | /delete-property/ assigned-clock-parents; |
| 313 | clocks = <&clk_19_2mhz>; |
Aswath Govindraju | 2cd46c2 | 2021-08-26 21:28:57 +0530 | [diff] [blame] | 314 | clock-names = "ref"; |
Vignesh Raghavendra | 4bdd330 | 2020-01-27 17:59:25 +0530 | [diff] [blame] | 315 | pinctrl-names = "default"; |
| 316 | pinctrl-0 = <&main_usbss0_pins_default>; |
| 317 | ti,vbus-divider; |
| 318 | }; |
| 319 | |
Vignesh Raghavendra | 8a290cc | 2020-01-27 23:22:15 +0530 | [diff] [blame] | 320 | &main_i2c0 { |
| 321 | pinctrl-names = "default"; |
| 322 | pinctrl-0 = <&main_i2c0_pins_default>; |
| 323 | clock-frequency = <400000>; |
| 324 | |
| 325 | exp1: gpio@20 { |
| 326 | compatible = "ti,tca6416"; |
| 327 | reg = <0x20>; |
| 328 | gpio-controller; |
| 329 | #gpio-cells = <2>; |
| 330 | }; |
| 331 | |
| 332 | exp2: gpio@22 { |
| 333 | compatible = "ti,tca6424"; |
| 334 | reg = <0x22>; |
| 335 | gpio-controller; |
| 336 | #gpio-cells = <2>; |
| 337 | }; |
| 338 | }; |
| 339 | |
Vaishnav Achath | fb708a4 | 2022-05-09 11:50:11 +0530 | [diff] [blame] | 340 | &hbmc { |
| 341 | status = "okay"; |
| 342 | pinctrl-names = "default"; |
| 343 | pinctrl-0 = <&mcu_fss0_hpb0_pins_default>; |
| 344 | reg = <0x0 0x47040000 0x0 0x100>, |
| 345 | <0x0 0x50000000 0x0 0x8000000>; |
| 346 | ranges = <0x0 0x0 0x0 0x50000000 0x4000000>, /* 64MB Flash on CS0 */ |
| 347 | <0x1 0x0 0x0 0x54000000 0x800000>; /* 8MB flash on CS1 */ |
| 348 | |
| 349 | flash@0,0 { |
| 350 | compatible = "cypress,hyperflash", "cfi-flash"; |
| 351 | reg = <0x0 0x0 0x4000000>; |
| 352 | }; |
| 353 | }; |
| 354 | |
Vignesh Raghavendra | da67437 | 2020-02-04 11:09:52 +0530 | [diff] [blame] | 355 | &ospi0 { |
| 356 | pinctrl-names = "default"; |
| 357 | pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; |
| 358 | |
| 359 | reg = <0x0 0x47040000 0x0 0x100>, |
| 360 | <0x0 0x50000000 0x0 0x8000000>; |
| 361 | |
| 362 | flash@0{ |
| 363 | compatible = "jedec,spi-nor"; |
| 364 | reg = <0x0>; |
| 365 | spi-tx-bus-width = <1>; |
| 366 | spi-rx-bus-width = <8>; |
Vignesh Raghavendra | f9a36d5 | 2020-04-02 18:59:13 +0530 | [diff] [blame] | 367 | spi-max-frequency = <50000000>; |
Vignesh Raghavendra | da67437 | 2020-02-04 11:09:52 +0530 | [diff] [blame] | 368 | cdns,tshsl-ns = <60>; |
| 369 | cdns,tsd2d-ns = <60>; |
| 370 | cdns,tchsh-ns = <60>; |
| 371 | cdns,tslch-ns = <60>; |
| 372 | cdns,read-delay = <0>; |
| 373 | #address-cells = <1>; |
| 374 | #size-cells = <1>; |
| 375 | }; |
| 376 | }; |
| 377 | |
Keerthy | 7b0b42d | 2020-03-04 10:10:01 +0530 | [diff] [blame] | 378 | &ospi1 { |
| 379 | pinctrl-names = "default"; |
| 380 | pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 381 | bootph-pre-ram; |
Keerthy | 7b0b42d | 2020-03-04 10:10:01 +0530 | [diff] [blame] | 382 | |
| 383 | reg = <0x0 0x47050000 0x0 0x100>, |
| 384 | <0x0 0x58000000 0x0 0x8000000>; |
| 385 | |
| 386 | flash@0{ |
| 387 | compatible = "jedec,spi-nor"; |
| 388 | reg = <0x0>; |
| 389 | spi-tx-bus-width = <1>; |
| 390 | spi-rx-bus-width = <4>; |
| 391 | spi-max-frequency = <40000000>; |
| 392 | cdns,tshsl-ns = <60>; |
| 393 | cdns,tsd2d-ns = <60>; |
| 394 | cdns,tchsh-ns = <60>; |
| 395 | cdns,tslch-ns = <60>; |
| 396 | cdns,read-delay = <2>; |
| 397 | #address-cells = <1>; |
| 398 | #size-cells = <1>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 399 | bootph-pre-ram; |
Keerthy | 7b0b42d | 2020-03-04 10:10:01 +0530 | [diff] [blame] | 400 | }; |
| 401 | }; |
Vignesh Raghavendra | 9818197 | 2021-06-07 19:47:50 +0530 | [diff] [blame] | 402 | |
| 403 | &mcu_ringacc { |
| 404 | ti,sci = <&dm_tifs>; |
| 405 | }; |
| 406 | |
| 407 | &mcu_udmap { |
| 408 | ti,sci = <&dm_tifs>; |
| 409 | }; |
Aswath Govindraju | dcfb97e | 2022-01-28 13:41:39 +0530 | [diff] [blame] | 410 | |
| 411 | &wiz0_pll1_refclk { |
| 412 | assigned-clocks = <&wiz0_pll1_refclk>; |
| 413 | assigned-clock-parents = <&cmn_refclk1>; |
| 414 | }; |
| 415 | |
| 416 | &wiz0_refclk_dig { |
| 417 | assigned-clocks = <&wiz0_refclk_dig>; |
| 418 | assigned-clock-parents = <&cmn_refclk1>; |
| 419 | }; |
| 420 | |
| 421 | &serdes0 { |
Aswath Govindraju | 83a8367 | 2022-01-28 13:41:51 +0530 | [diff] [blame] | 422 | assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC>, <&serdes0 CDNS_SIERRA_PLL_CMNLC1>; |
| 423 | assigned-clock-parents = <&wiz0_pll1_refclk>, <&wiz0_pll1_refclk>; |
Aswath Govindraju | dcfb97e | 2022-01-28 13:41:39 +0530 | [diff] [blame] | 424 | |
| 425 | serdes0_pcie_link: link@0 { |
| 426 | reg = <0>; |
| 427 | cdns,num-lanes = <1>; |
| 428 | #phy-cells = <0>; |
| 429 | cdns,phy-type = <PHY_TYPE_PCIE>; |
| 430 | resets = <&serdes_wiz0 1>; |
| 431 | }; |
Aswath Govindraju | 83a8367 | 2022-01-28 13:41:51 +0530 | [diff] [blame] | 432 | |
| 433 | serdes0_qsgmii_link: phy@1 { |
| 434 | reg = <1>; |
| 435 | cdns,num-lanes = <1>; |
| 436 | #phy-cells = <0>; |
| 437 | cdns,phy-type = <PHY_TYPE_QSGMII>; |
| 438 | resets = <&serdes_wiz0 2>; |
| 439 | }; |
Aswath Govindraju | dcfb97e | 2022-01-28 13:41:39 +0530 | [diff] [blame] | 440 | }; |
Sinthu Raja | 7fa564c | 2022-02-09 15:06:54 +0530 | [diff] [blame] | 441 | |
| 442 | /* EEPROM might be read before SYSFW is available */ |
| 443 | &wkup_i2c0 { |
| 444 | /delete-property/ power-domains; |
| 445 | }; |