| commit | dcfb97e1f0a17d2670aee2d3f7c4181414dd16e5 | [log] [tgz] |
|---|---|---|
| author | Aswath Govindraju <a-govindraju@ti.com> | Fri Jan 28 13:41:39 2022 +0530 |
| committer | Tom Rini <trini@konsulko.com> | Tue Feb 08 11:00:03 2022 -0500 |
| tree | 3f09c5cb1dc2458fc82d47f4c201bb0cb213b570 | |
| parent | a2775f324575571e844ff4915361249a9abafa4e [diff] |
arm: dts: k3-j721e: Add support for PLL_CMNLC clocks in SerDes0 The PLL_CMNLC clocks are modelled as a child clock device of seirra. In the function device_probe, the corresponding clocks are probed before calling the device's probe. The PLL_CMNLC mux clock can only be created after the device's probe. Therefore, move assigned-clocks and assigned-clock-parents to the link nodes in U-Boot device tree file. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>