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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Simon Glass0e724032012-12-13 20:49:12 +00002/*
3 * Copyright (c) 2012 The Chromium OS Authors.
4 * (C) Copyright 2002-2010
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Simon Glass0e724032012-12-13 20:49:12 +00006 */
7
8#ifndef __ASM_GENERIC_GBL_DATA_H
9#define __ASM_GENERIC_GBL_DATA_H
10/*
11 * The following data structure is placed in some memory which is
12 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
13 * some locked parts of the data cache) to allow for a minimum set of
14 * global variables during system initialization (until we have set
15 * up the memory controller so that we can use RAM).
16 *
17 * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t)
18 *
19 * Each architecture has its own private fields. For now all are private
20 */
21
22#ifndef __ASSEMBLY__
Stefan Roese85bddff2019-04-12 16:42:28 +020023#include <fdtdec.h>
Simon Glass1bb49232015-11-08 23:47:48 -070024#include <membuff.h>
Simon Glassdd6ab882014-02-26 15:59:18 -070025#include <linux/list.h>
26
Simon Glass0e724032012-12-13 20:49:12 +000027typedef struct global_data {
28 bd_t *bd;
29 unsigned long flags;
Simon Glass059c54f2013-03-05 14:40:05 +000030 unsigned int baudrate;
Robert P. J. Day3261d062016-09-01 12:54:32 -040031 unsigned long cpu_clk; /* CPU clock in Hz! */
Simon Glass0e724032012-12-13 20:49:12 +000032 unsigned long bus_clk;
33 /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
34 unsigned long pci_clk;
35 unsigned long mem_clk;
Heiko Schocher70bd8182019-07-22 06:49:04 +020036#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) || defined(CONFIG_DM_VIDEO)
Robert P. J. Day3261d062016-09-01 12:54:32 -040037 unsigned long fb_base; /* Base address of framebuffer mem */
Simon Glass0e724032012-12-13 20:49:12 +000038#endif
Simon Glass49badb92017-12-04 13:48:23 -070039#if defined(CONFIG_POST)
Robert P. J. Day3261d062016-09-01 12:54:32 -040040 unsigned long post_log_word; /* Record POST activities */
41 unsigned long post_log_res; /* success of POST test */
42 unsigned long post_init_f_time; /* When post_init_f started */
Simon Glass0e724032012-12-13 20:49:12 +000043#endif
44#ifdef CONFIG_BOARD_TYPES
45 unsigned long board_type;
46#endif
47 unsigned long have_console; /* serial_init() was called */
Simon Glasse304a5e2016-10-17 20:12:36 -060048#if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER)
Simon Glass0e724032012-12-13 20:49:12 +000049 unsigned long precon_buf_idx; /* Pre-Console buffer index */
50#endif
Robert P. J. Day3261d062016-09-01 12:54:32 -040051 unsigned long env_addr; /* Address of Environment struct */
Simon Glass4bc2ad22017-08-03 12:21:56 -060052 unsigned long env_valid; /* Environment valid? enum env_valid */
Maxime Ripard2131c5e2018-01-23 21:16:59 +010053 unsigned long env_has_init; /* Bitmask of boolean of struct env_location offsets */
Nicholas Faustinia8a17f82018-07-23 10:01:07 +020054 int env_load_prio; /* Priority of the loaded environment */
Simon Glass0e724032012-12-13 20:49:12 +000055
Michael Prattfa28d142018-06-11 13:07:09 -060056 unsigned long ram_base; /* Base address of RAM used by U-Boot */
Robert P. J. Day3261d062016-09-01 12:54:32 -040057 unsigned long ram_top; /* Top address of RAM used by U-Boot */
Simon Glass0e724032012-12-13 20:49:12 +000058 unsigned long relocaddr; /* Start address of U-Boot in RAM */
Robert P. J. Day3261d062016-09-01 12:54:32 -040059 phys_size_t ram_size; /* RAM size */
60 unsigned long mon_len; /* monitor len */
Simon Glass0e724032012-12-13 20:49:12 +000061 unsigned long irq_sp; /* irq stack pointer */
62 unsigned long start_addr_sp; /* start_addr_stackpointer */
63 unsigned long reloc_off;
64 struct global_data *new_gd; /* relocated global data */
Simon Glassdd6ab882014-02-26 15:59:18 -070065
66#ifdef CONFIG_DM
Simon Glassa730c5d2014-07-23 06:55:04 -060067 struct udevice *dm_root; /* Root instance for Driver Model */
68 struct udevice *dm_root_f; /* Pre-relocation root instance */
Simon Glassdd6ab882014-02-26 15:59:18 -070069 struct list_head uclass_root; /* Head of core tree */
70#endif
Thomas Choufb798b12015-10-09 13:46:34 +080071#ifdef CONFIG_TIMER
Robert P. J. Day3261d062016-09-01 12:54:32 -040072 struct udevice *timer; /* Timer instance for Driver Model */
Thomas Choufb798b12015-10-09 13:46:34 +080073#endif
Simon Glassdd6ab882014-02-26 15:59:18 -070074
Robert P. J. Day3261d062016-09-01 12:54:32 -040075 const void *fdt_blob; /* Our device tree, NULL if none */
76 void *new_fdt; /* Relocated FDT */
77 unsigned long fdt_size; /* Space reserved for relocated FDT */
Simon Glassa6eedb82017-05-18 20:08:53 -060078#ifdef CONFIG_OF_LIVE
79 struct device_node *of_root;
80#endif
Jean-Jacques Hiblot7c530e32018-12-07 14:50:52 +010081
82#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
83 const void *multi_dtb_fit; /* uncompressed multi-dtb FIT image */
84#endif
Martin Dorwigcb2c2862015-01-26 15:22:54 -070085 struct jt_funcs *jt; /* jump table */
Simon Glass64b723f2017-08-03 12:22:12 -060086 char env_buf[32]; /* buffer for env_get() before reloc. */
Simon Glass209a1a62013-06-11 11:14:42 -070087#ifdef CONFIG_TRACE
88 void *trace_buff; /* The trace buffer */
89#endif
Heiko Schochere7d9c4f2012-01-16 21:12:23 +000090#if defined(CONFIG_SYS_I2C)
91 int cur_i2c_bus; /* current used i2c bus */
92#endif
York Suna4c02662014-02-10 14:02:52 -080093#ifdef CONFIG_SYS_I2C_MXC
94 void *srdata[10];
95#endif
Peng Fan9a60a9e2017-05-09 10:32:03 +080096 unsigned int timebase_h;
97 unsigned int timebase_l;
Andy Yan1fa20e4d2017-07-24 17:43:34 +080098#if CONFIG_VAL(SYS_MALLOC_F_LEN)
Simon Glass863e4042014-07-10 22:23:28 -060099 unsigned long malloc_base; /* base address of early malloc() */
100 unsigned long malloc_limit; /* limit address */
101 unsigned long malloc_ptr; /* current address */
102#endif
Bin Mengf1b81fc2014-12-30 22:53:21 +0800103#ifdef CONFIG_PCI
104 struct pci_controller *hose; /* PCI hose for early use */
Simon Glass5888bd22015-07-03 18:28:27 -0600105 phys_addr_t pci_ram_top; /* top of region accessible to PCI */
Bin Mengf1b81fc2014-12-30 22:53:21 +0800106#endif
107#ifdef CONFIG_PCI_BOOTDELAY
108 int pcidelay_done;
109#endif
Simon Glassa4c2e132014-11-10 18:00:20 -0700110 struct udevice *cur_serial_dev; /* current serial device */
Simon Glass04ae3d02015-08-17 09:28:44 -0600111 struct arch_global_data arch; /* architecture-specific data */
Simon Glass1bb49232015-11-08 23:47:48 -0700112#ifdef CONFIG_CONSOLE_RECORD
113 struct membuff console_out; /* console output */
114 struct membuff console_in; /* console input */
115#endif
Simon Glassfce58f52016-01-18 19:52:21 -0700116#ifdef CONFIG_DM_VIDEO
117 ulong video_top; /* Top of video frame buffer area */
118 ulong video_bottom; /* Bottom of video frame buffer area */
119#endif
Simon Glass88200332017-05-22 05:05:25 -0600120#ifdef CONFIG_BOOTSTAGE
121 struct bootstage_data *bootstage; /* Bootstage information */
Simon Glassb9aff922017-05-22 05:05:30 -0600122 struct bootstage_data *new_bootstage; /* Relocated bootstage info */
Simon Glass88200332017-05-22 05:05:25 -0600123#endif
Simon Glassd95645d2017-12-04 13:48:24 -0700124#ifdef CONFIG_LOG
125 int log_drop_count; /* Number of dropped log messages */
126 int default_log_level; /* For devices with no filters */
127 struct list_head log_head; /* List of struct log_device */
Simon Glass1fe93012017-12-28 13:14:17 -0700128 int log_fmt; /* Mask containing log format info */
Simon Glassd95645d2017-12-04 13:48:24 -0700129#endif
Simon Glassa815dab2018-11-15 18:43:52 -0700130#if CONFIG_IS_ENABLED(BLOBLIST)
131 struct bloblist_hdr *bloblist; /* Bloblist information */
132 struct bloblist_hdr *new_bloblist; /* Relocated blolist info */
Simon Glasse14f1a22018-11-15 18:44:09 -0700133# ifdef CONFIG_SPL
134 struct spl_handoff *spl_handoff;
135# endif
Simon Glassa815dab2018-11-15 18:43:52 -0700136#endif
Stefan Roese85bddff2019-04-12 16:42:28 +0200137#if defined(CONFIG_TRANSLATION_OFFSET)
138 fdt_addr_t translation_offset; /* optional translation offset */
139#endif
Marek Vasut55ec91b2019-06-09 03:46:21 +0200140#if CONFIG_IS_ENABLED(WDT)
Stefan Roese502acb02019-04-11 15:58:44 +0200141 struct udevice *watchdog_dev;
142#endif
Simon Glass0e724032012-12-13 20:49:12 +0000143} gd_t;
144#endif
145
Simon Glassb4de3f32017-03-31 08:40:24 -0600146#ifdef CONFIG_BOARD_TYPES
147#define gd_board_type() gd->board_type
148#else
149#define gd_board_type() 0
150#endif
151
Simon Glass0e724032012-12-13 20:49:12 +0000152/*
Stefan Roesef3cc3a02019-08-16 14:45:29 +0200153 * Global Data Flags
Simon Glass0e724032012-12-13 20:49:12 +0000154 */
155#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
156#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
157#define GD_FLG_SILENT 0x00004 /* Silent mode */
158#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
159#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
160#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
161#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
162#define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */
Simon Glassb9d5f6b2014-07-23 06:55:07 -0600163#define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */
Simon Glass94890462014-11-10 17:16:43 -0700164#define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */
Simon Glassfa2a4db2015-06-23 15:39:10 -0600165#define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */
Robert P. J. Day3261d062016-09-01 12:54:32 -0400166#define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */
167#define GD_FLG_RECORD 0x01000 /* Record console */
168#define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */
Eddie Cai32258992017-03-15 08:43:28 -0600169#define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */
Simon Glass55e32ba2017-12-04 13:48:28 -0700170#define GD_FLG_LOG_READY 0x08000 /* Log system is ready for use */
Stefan Roese502acb02019-04-11 15:58:44 +0200171#define GD_FLG_WDT_READY 0x10000 /* Watchdog is ready for use */
Simon Glass0e724032012-12-13 20:49:12 +0000172
173#endif /* __ASM_GENERIC_GBL_DATA_H */