Blame - board/freescale/mx51evk/imximage.cfg - filogic/uboot

blob: a3b85932c2cecc6a048252a1aaecb0efb2e5565f [file] [log] [blame]

Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	1	/*
				2	* (C Copyright 2009
				3	* Stefano Babic DENX Software Engineering sbabic@denx.de.
				4	*
Wolfgang Denk	d79de1d	2013-07-08 09:37:19 +0200	[diff] [blame^]	5	* SPDX-License-Identifier: GPL-2.0+
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	6	*
Anatolij Gustschin	fd4b3d3	2013-04-30 11:15:33 +0000	[diff] [blame]	7	* Refer doc/README.imximage for more details about how-to configure
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	8	* and create imximage boot image
				9	*
				10	* The syntax is taken as close as possible with the kwbimage
				11	*/
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	12
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	13	/*
				14	* Boot Device : one of
				15	* spi, sd (the board has no nand neither onenand)
				16	*/
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	17	BOOT_FROM spi
				18
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	19	/*
				20	* Device Configuration Data (DCD)
				21	*
				22	* Each entry must have the format:
				23	* Addr-type Address Value
				24	*
				25	* where:
				26	* Addr-type register length (1,2 or 4 bytes)
				27	* Address absolute address of the register
				28	* value value to be stored in the register
				29	*/
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	30
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	31	/* Setting IOMUXC */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	32	DATA 4 0x73FA88a0 0x200
				33	DATA 4 0x73FA850c 0x20c5
				34	DATA 4 0x73FA8510 0x20c5
				35	DATA 4 0x73FA883c 0x2
				36	DATA 4 0x73FA8848 0x2
				37	DATA 4 0x73FA84b8 0xe7
				38	DATA 4 0x73FA84bc 0x45
				39	DATA 4 0x73FA84c0 0x45
				40	DATA 4 0x73FA84c4 0x45
				41	DATA 4 0x73FA84c8 0x45
				42	DATA 4 0x73FA8820 0x0
				43	DATA 4 0x73FA84a4 0x3
				44	DATA 4 0x73FA84a8 0x3
				45	DATA 4 0x73FA84ac 0xe3
				46	DATA 4 0x73FA84b0 0xe3
				47	DATA 4 0x73FA84b4 0xe3
				48	DATA 4 0x73FA84cc 0xe3
				49	DATA 4 0x73FA84d0 0xe2
				50
				51	DATA 4 0x73FA882c 0x6
				52	DATA 4 0x73FA88a4 0x6
				53	DATA 4 0x73FA88ac 0x6
				54	DATA 4 0x73FA88b8 0x6
				55
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	56	/*
				57	* Setting DDR for micron
				58	* 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model
				59	* CAS=3 BL=4
				60	*/
				61	/* ESDCTL_ESDCTL0 */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	62	DATA 4 0x83FD9000 0x82a20000
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	63	/* ESDCTL_ESDCTL1 */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	64	DATA 4 0x83FD9008 0x82a20000
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	65	/* ESDCTL_ESDMISC */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	66	DATA 4 0x83FD9010 0x000ad0d0
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	67	/* ESDCTL_ESDCFG0 */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	68	DATA 4 0x83FD9004 0x333574aa
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	69	/* ESDCTL_ESDCFG1 */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	70	DATA 4 0x83FD900C 0x333574aa
				71
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	72	/* Init DRAM on CS0 */
				73	/* ESDCTL_ESDSCR */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	74	DATA 4 0x83FD9014 0x04008008
				75	DATA 4 0x83FD9014 0x0000801a
				76	DATA 4 0x83FD9014 0x0000801b
				77	DATA 4 0x83FD9014 0x00448019
				78	DATA 4 0x83FD9014 0x07328018
				79	DATA 4 0x83FD9014 0x04008008
				80	DATA 4 0x83FD9014 0x00008010
				81	DATA 4 0x83FD9014 0x00008010
				82	DATA 4 0x83FD9014 0x06328018
				83	DATA 4 0x83FD9014 0x03808019
				84	DATA 4 0x83FD9014 0x00408019
				85	DATA 4 0x83FD9014 0x00008000
				86
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	87	/* Init DRAM on CS1 */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	88	DATA 4 0x83FD9014 0x0400800c
				89	DATA 4 0x83FD9014 0x0000801e
				90	DATA 4 0x83FD9014 0x0000801f
				91	DATA 4 0x83FD9014 0x0000801d
				92	DATA 4 0x83FD9014 0x0732801c
				93	DATA 4 0x83FD9014 0x0400800c
				94	DATA 4 0x83FD9014 0x00008014
				95	DATA 4 0x83FD9014 0x00008014
				96	DATA 4 0x83FD9014 0x0632801c
				97	DATA 4 0x83FD9014 0x0380801d
				98	DATA 4 0x83FD9014 0x0040801d
				99	DATA 4 0x83FD9014 0x00008004
				100
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	101	/* Write to CTL0 */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	102	DATA 4 0x83FD9000 0xb2a20000
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	103	/* Write to CTL1 */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	104	DATA 4 0x83FD9008 0xb2a20000
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	105	/* ESDMISC */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	106	DATA 4 0x83FD9010 0x000ad6d0
Troy Kisky	a18d786	2013-01-18 16:14:24 +0000	[diff] [blame]	107	/* ESDCTL_ESDCDLYGD */
Stefano Babic	421834e	2010-02-05 15:13:58 +0100	[diff] [blame]	108	DATA 4 0x83FD9034 0x90000000
				109	DATA 4 0x83FD9014 0x00000000