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Kumar Gala95bb67f2008-01-16 22:33:22 -06001/*
Kumar Galad7ff6a82011-02-03 20:21:42 -06002 * Copyright 2008-2011 Freescale Semiconductor, Inc.
Kumar Gala95bb67f2008-01-16 22:33:22 -06003 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Kumar Gala95bb67f2008-01-16 22:33:22 -06008 */
9
10#include <common.h>
11#include <asm/processor.h>
12#include <asm/mmu.h>
Kumar Gala9ac287a2008-12-16 14:59:20 -060013#ifdef CONFIG_ADDR_MAP
14#include <addr_map.h>
15#endif
16
17DECLARE_GLOBAL_DATA_PTR;
Kumar Gala95bb67f2008-01-16 22:33:22 -060018
Kumar Galaafc51ad2009-09-11 12:32:01 -050019void invalidate_tlb(u8 tlb)
20{
21 if (tlb == 0)
22 mtspr(MMUCSR0, 0x4);
23 if (tlb == 1)
24 mtspr(MMUCSR0, 0x2);
25}
26
27void init_tlbs(void)
28{
29 int i;
30
31 for (i = 0; i < num_tlb_entries; i++) {
32 write_tlb(tlb_table[i].mas0,
33 tlb_table[i].mas1,
34 tlb_table[i].mas2,
35 tlb_table[i].mas3,
36 tlb_table[i].mas7);
37 }
38
39 return ;
40}
41
Scott Wood095b7122012-09-20 19:02:18 -050042#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
Becky Bruce9fa52d42010-06-17 11:37:21 -050043void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,
44 phys_addr_t *rpn)
45{
46 u32 _mas1;
47
48 mtspr(MAS0, FSL_BOOKE_MAS0(1, idx, 0));
49 asm volatile("tlbre;isync");
50 _mas1 = mfspr(MAS1);
51
52 *valid = (_mas1 & MAS1_VALID);
Scott Wood33a619c2013-01-18 15:45:58 +000053 *tsize = (_mas1 >> 7) & 0x1f;
Becky Bruce9fa52d42010-06-17 11:37:21 -050054 *epn = mfspr(MAS2) & MAS2_EPN;
55 *rpn = mfspr(MAS3) & MAS3_RPN;
56#ifdef CONFIG_ENABLE_36BIT_PHYS
57 *rpn |= ((u64)mfspr(MAS7)) << 32;
58#endif
59}
60
Becky Bruce7b9cdb42010-06-17 11:37:22 -050061void print_tlbcam(void)
62{
63 int i;
64 unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff;
65
66 /* walk all the entries */
67 printf("TLBCAM entries\n");
68 for (i = 0; i < num_cam; i++) {
69 unsigned long epn;
70 u32 tsize, valid;
71 phys_addr_t rpn;
72
73 read_tlbcam_entry(i, &valid, &tsize, &epn, &rpn);
74 printf("entry %02d: V: %d EPN 0x%08x RPN 0x%08llx size:",
75 i, (valid == 0) ? 0 : 1, (unsigned int)epn,
76 (unsigned long long)rpn);
77 print_size(TSIZE_TO_BYTES(tsize), "\n");
78 }
79}
80
Kumar Gala42f99182009-11-12 10:26:16 -060081static inline void use_tlb_cam(u8 idx)
82{
83 int i = idx / 32;
84 int bit = idx % 32;
85
Simon Glass0b466582012-12-13 20:48:52 +000086 gd->arch.used_tlb_cams[i] |= (1 << bit);
Kumar Gala42f99182009-11-12 10:26:16 -060087}
88
89static inline void free_tlb_cam(u8 idx)
90{
91 int i = idx / 32;
92 int bit = idx % 32;
93
Simon Glass0b466582012-12-13 20:48:52 +000094 gd->arch.used_tlb_cams[i] &= ~(1 << bit);
Kumar Gala42f99182009-11-12 10:26:16 -060095}
96
97void init_used_tlb_cams(void)
98{
99 int i;
100 unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff;
101
102 for (i = 0; i < ((CONFIG_SYS_NUM_TLBCAMS+31)/32); i++)
Simon Glass0b466582012-12-13 20:48:52 +0000103 gd->arch.used_tlb_cams[i] = 0;
Kumar Gala42f99182009-11-12 10:26:16 -0600104
105 /* walk all the entries */
106 for (i = 0; i < num_cam; i++) {
Kumar Gala42f99182009-11-12 10:26:16 -0600107 mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0));
Kumar Gala42f99182009-11-12 10:26:16 -0600108 asm volatile("tlbre;isync");
Becky Bruce9fa52d42010-06-17 11:37:21 -0500109 if (mfspr(MAS1) & MAS1_VALID)
Kumar Gala42f99182009-11-12 10:26:16 -0600110 use_tlb_cam(i);
111 }
112}
113
114int find_free_tlbcam(void)
115{
116 int i;
117 u32 idx;
118
119 for (i = 0; i < ((CONFIG_SYS_NUM_TLBCAMS+31)/32); i++) {
Simon Glass0b466582012-12-13 20:48:52 +0000120 idx = ffz(gd->arch.used_tlb_cams[i]);
Kumar Gala42f99182009-11-12 10:26:16 -0600121
122 if (idx != 32)
123 break;
124 }
125
126 idx += i * 32;
127
128 if (idx >= CONFIG_SYS_NUM_TLBCAMS)
129 return -1;
130
131 return idx;
132}
133
Kumar Gala95bb67f2008-01-16 22:33:22 -0600134void set_tlb(u8 tlb, u32 epn, u64 rpn,
135 u8 perms, u8 wimge,
136 u8 ts, u8 esel, u8 tsize, u8 iprot)
137{
138 u32 _mas0, _mas1, _mas2, _mas3, _mas7;
139
Kumar Gala42f99182009-11-12 10:26:16 -0600140 if (tlb == 1)
141 use_tlb_cam(esel);
142
Scott Wood33a619c2013-01-18 15:45:58 +0000143 if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1 &&
144 tsize & 1) {
145 printf("%s: bad tsize %d on entry %d at 0x%08x\n",
146 __func__, tsize, tlb, epn);
147 return;
148 }
149
Kumar Gala95bb67f2008-01-16 22:33:22 -0600150 _mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
151 _mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
152 _mas2 = FSL_BOOKE_MAS2(epn, wimge);
153 _mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
Kumar Galac417c912009-09-11 11:27:00 -0500154 _mas7 = FSL_BOOKE_MAS7(rpn);
Kumar Gala95bb67f2008-01-16 22:33:22 -0600155
Kumar Galac417c912009-09-11 11:27:00 -0500156 write_tlb(_mas0, _mas1, _mas2, _mas3, _mas7);
Kumar Gala9ac287a2008-12-16 14:59:20 -0600157
158#ifdef CONFIG_ADDR_MAP
159 if ((tlb == 1) && (gd->flags & GD_FLG_RELOC))
Becky Bruce9fa52d42010-06-17 11:37:21 -0500160 addrmap_set_entry(epn, rpn, TSIZE_TO_BYTES(tsize), esel);
Kumar Gala9ac287a2008-12-16 14:59:20 -0600161#endif
Kumar Gala95bb67f2008-01-16 22:33:22 -0600162}
163
164void disable_tlb(u8 esel)
165{
Kumar Gala4a272472011-11-09 09:59:32 -0600166 u32 _mas0, _mas1, _mas2, _mas3;
Kumar Gala95bb67f2008-01-16 22:33:22 -0600167
Kumar Gala42f99182009-11-12 10:26:16 -0600168 free_tlb_cam(esel);
169
Kumar Gala95bb67f2008-01-16 22:33:22 -0600170 _mas0 = FSL_BOOKE_MAS0(1, esel, 0);
171 _mas1 = 0;
172 _mas2 = 0;
173 _mas3 = 0;
Kumar Gala95bb67f2008-01-16 22:33:22 -0600174
175 mtspr(MAS0, _mas0);
176 mtspr(MAS1, _mas1);
177 mtspr(MAS2, _mas2);
178 mtspr(MAS3, _mas3);
179#ifdef CONFIG_ENABLE_36BIT_PHYS
Kumar Gala4a272472011-11-09 09:59:32 -0600180 mtspr(MAS7, 0);
Kumar Gala95bb67f2008-01-16 22:33:22 -0600181#endif
182 asm volatile("isync;msync;tlbwe;isync");
Kumar Gala9ac287a2008-12-16 14:59:20 -0600183
184#ifdef CONFIG_ADDR_MAP
185 if (gd->flags & GD_FLG_RELOC)
186 addrmap_set_entry(0, 0, 0, esel);
187#endif
Kumar Gala95bb67f2008-01-16 22:33:22 -0600188}
189
Kumar Galad13eb3c2009-09-03 08:20:24 -0500190static void tlbsx (const volatile unsigned *addr)
191{
192 __asm__ __volatile__ ("tlbsx 0,%0" : : "r" (addr), "m" (*addr));
193}
194
195/* return -1 if we didn't find anything */
196int find_tlb_idx(void *addr, u8 tlbsel)
197{
198 u32 _mas0, _mas1;
199
200 /* zero out Search PID, AS */
201 mtspr(MAS6, 0);
202
203 tlbsx(addr);
204
205 _mas0 = mfspr(MAS0);
206 _mas1 = mfspr(MAS1);
207
208 /* we found something, and its in the TLB we expect */
209 if ((MAS1_VALID & _mas1) &&
210 (MAS0_TLBSEL(tlbsel) == (_mas0 & MAS0_TLBSEL_MSK))) {
211 return ((_mas0 & MAS0_ESEL_MSK) >> 16);
212 }
213
214 return -1;
215}
216
Kumar Gala9ac287a2008-12-16 14:59:20 -0600217#ifdef CONFIG_ADDR_MAP
218void init_addr_map(void)
219{
220 int i;
Kumar Gala7601fb22009-11-13 08:52:21 -0600221 unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff;
Kumar Gala9ac287a2008-12-16 14:59:20 -0600222
Kumar Gala87f57922009-08-14 16:43:22 -0500223 /* walk all the entries */
Kumar Gala7601fb22009-11-13 08:52:21 -0600224 for (i = 0; i < num_cam; i++) {
Kumar Gala87f57922009-08-14 16:43:22 -0500225 unsigned long epn;
Becky Bruce9fa52d42010-06-17 11:37:21 -0500226 u32 tsize, valid;
Kumar Gala87f57922009-08-14 16:43:22 -0500227 phys_addr_t rpn;
228
Becky Bruce9fa52d42010-06-17 11:37:21 -0500229 read_tlbcam_entry(i, &valid, &tsize, &epn, &rpn);
230 if (valid & MAS1_VALID)
231 addrmap_set_entry(epn, rpn, TSIZE_TO_BYTES(tsize), i);
Kumar Gala9ac287a2008-12-16 14:59:20 -0600232 }
233
234 return ;
235}
236#endif
237
York Sunba99a332010-09-28 15:20:32 -0700238unsigned int
239setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
Kumar Gala80f4bc72008-06-09 11:07:46 -0500240{
Kumar Gala419083b2009-11-13 09:04:19 -0600241 int i;
Kumar Gala80f4bc72008-06-09 11:07:46 -0500242 unsigned int tlb_size;
York Sun2394a0f2012-10-08 07:44:30 +0000243 unsigned int wimge = MAS2_M;
Kumar Gala6630ffb2009-02-06 09:56:35 -0600244 unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
Scott Wood33a619c2013-01-18 15:45:58 +0000245 unsigned int max_cam, tsize_mask;
Kumar Gala6630ffb2009-02-06 09:56:35 -0600246 u64 size, memsize = (u64)memsize_in_meg << 20;
Kumar Gala80f4bc72008-06-09 11:07:46 -0500247
Becky Bruce92e163f2010-12-17 17:17:55 -0600248#ifdef CONFIG_SYS_PPC_DDR_WIMGE
249 wimge = CONFIG_SYS_PPC_DDR_WIMGE;
250#endif
Kumar Gala6630ffb2009-02-06 09:56:35 -0600251 size = min(memsize, CONFIG_MAX_MEM_MAPPED);
Kumar Galaac7e8952011-10-31 22:13:26 -0500252 if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
253 /* Convert (4^max) kB to (2^max) bytes */
254 max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
Scott Wood33a619c2013-01-18 15:45:58 +0000255 tsize_mask = ~1U;
Kumar Galaac7e8952011-10-31 22:13:26 -0500256 } else {
257 /* Convert (2^max) kB to (2^max) bytes */
258 max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
Scott Wood33a619c2013-01-18 15:45:58 +0000259 tsize_mask = ~0U;
Kumar Galaac7e8952011-10-31 22:13:26 -0500260 }
Kumar Gala6630ffb2009-02-06 09:56:35 -0600261
Kumar Gala419083b2009-11-13 09:04:19 -0600262 for (i = 0; size && i < 8; i++) {
263 int ram_tlb_index = find_free_tlbcam();
Scott Wood33a619c2013-01-18 15:45:58 +0000264 u32 camsize = __ilog2_u64(size) & tsize_mask;
265 u32 align = __ilog2(ram_tlb_address) & tsize_mask;
Kumar Gala6630ffb2009-02-06 09:56:35 -0600266
Kumar Gala419083b2009-11-13 09:04:19 -0600267 if (ram_tlb_index == -1)
268 break;
269
Kumar Gala6630ffb2009-02-06 09:56:35 -0600270 if (align == -2) align = max_cam;
271 if (camsize > align)
272 camsize = align;
Kumar Gala80f4bc72008-06-09 11:07:46 -0500273
Kumar Gala6630ffb2009-02-06 09:56:35 -0600274 if (camsize > max_cam)
275 camsize = max_cam;
276
Scott Wood33a619c2013-01-18 15:45:58 +0000277 tlb_size = camsize - 10;
Kumar Gala6630ffb2009-02-06 09:56:35 -0600278
York Sunba99a332010-09-28 15:20:32 -0700279 set_tlb(1, ram_tlb_address, p_addr,
Becky Bruce92e163f2010-12-17 17:17:55 -0600280 MAS3_SX|MAS3_SW|MAS3_SR, wimge,
Kumar Gala80f4bc72008-06-09 11:07:46 -0500281 0, ram_tlb_index, tlb_size, 1);
282
Kumar Gala6630ffb2009-02-06 09:56:35 -0600283 size -= 1ULL << camsize;
284 memsize -= 1ULL << camsize;
285 ram_tlb_address += 1UL << camsize;
York Sunba99a332010-09-28 15:20:32 -0700286 p_addr += 1UL << camsize;
Kumar Gala80f4bc72008-06-09 11:07:46 -0500287 }
288
Kumar Gala6630ffb2009-02-06 09:56:35 -0600289 if (memsize)
Kumar Galad10d3b12009-06-11 23:40:34 -0500290 print_size(memsize, " left unmapped\n");
Kumar Gala80f4bc72008-06-09 11:07:46 -0500291 return memsize_in_meg;
292}
York Sunba99a332010-09-28 15:20:32 -0700293
294unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
295{
296 return
297 setup_ddr_tlbs_phys(CONFIG_SYS_DDR_SDRAM_BASE, memsize_in_meg);
298}
Becky Bruce69694472011-07-18 18:49:15 -0500299
300/* Invalidate the DDR TLBs for the requested size */
301void clear_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
302{
303 u32 vstart = CONFIG_SYS_DDR_SDRAM_BASE;
304 unsigned long epn;
305 u32 tsize, valid, ptr;
306 phys_addr_t rpn = 0;
307 int ddr_esel;
308 u64 memsize = (u64)memsize_in_meg << 20;
309
310 ptr = vstart;
311
312 while (ptr < (vstart + memsize)) {
313 ddr_esel = find_tlb_idx((void *)ptr, 1);
314 if (ddr_esel != -1) {
315 read_tlbcam_entry(ddr_esel, &valid, &tsize, &epn, &rpn);
316 disable_tlb(ddr_esel);
317 }
318 ptr += TSIZE_TO_BYTES(tsize);
319 }
320}
321
322void clear_ddr_tlbs(unsigned int memsize_in_meg)
323{
324 clear_ddr_tlbs_phys(CONFIG_SYS_DDR_SDRAM_BASE, memsize_in_meg);
325}
326
327
Scott Wood095b7122012-09-20 19:02:18 -0500328#endif /* not SPL */