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Yuantian Tang92f18ff2019-04-10 16:43:34 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Yangbo Lubb32e682021-06-03 10:51:19 +08003 * Copyright 2019-2021 NXP
Yuantian Tang92f18ff2019-04-10 16:43:34 +08004 */
5
6#ifndef __L1028A_COMMON_H
7#define __L1028A_COMMON_H
8
9#define CONFIG_REMAKE_ELF
Yuantian Tang92f18ff2019-04-10 16:43:34 +080010
11#include <asm/arch/stream_id_lsch3.h>
12#include <asm/arch/config.h>
13#include <asm/arch/soc.h>
14
15/* Link Definitions */
16#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
17
Yuantian Tang92f18ff2019-04-10 16:43:34 +080018#define CONFIG_VERY_BIG_RAM
19#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
20#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
21#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
22#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
23#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
24
Yuantian Tang92f18ff2019-04-10 16:43:34 +080025/*
26 * SMP Definitinos
27 */
Michael Wallef056e0f2020-06-01 21:53:26 +020028#define CPU_RELEASE_ADDR secondary_boot_addr
Yuantian Tang92f18ff2019-04-10 16:43:34 +080029
30/* Generic Timer Definitions */
31#define COUNTER_FREQUENCY 25000000 /* 25MHz */
32
Biwen Lie7c3b042021-02-05 19:01:57 +080033/* GPIO */
Biwen Lie7c3b042021-02-05 19:01:57 +080034
Yuantian Tang92f18ff2019-04-10 16:43:34 +080035/* I2C */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080036
37/* Serial Port */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080038#define CONFIG_SYS_NS16550_SERIAL
39#define CONFIG_SYS_NS16550_REG_SIZE 1
40#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
41
Yuantian Tang92f18ff2019-04-10 16:43:34 +080042/* Miscellaneous configurable options */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080043
44/* Physical Memory Map */
45#define CONFIG_CHIP_SELECTS_PER_CTRL 4
46
47#define CONFIG_HWCONFIG
48#define HWCONFIG_BUFFER_SIZE 128
49
Yuantian Tang92f18ff2019-04-10 16:43:34 +080050#define BOOT_TARGET_DEVICES(func) \
51 func(MMC, mmc, 0) \
Yuantian Tang7f3da7b2019-11-04 15:10:45 +080052 func(MMC, mmc, 1) \
Yuantian Tang7a224e72020-03-10 11:31:05 +080053 func(USB, usb, 0) \
54 func(DHCP, dhcp, na)
Yuantian Tang92f18ff2019-04-10 16:43:34 +080055#include <config_distro_bootcmd.h>
56
Yuantian Tang7f3da7b2019-11-04 15:10:45 +080057#define XSPI_NOR_BOOTCOMMAND \
58 "run xspi_hdploadcmd; run distro_bootcmd; run xspi_bootcmd; " \
59 "env exists secureboot && esbc_halt;;"
Yuantian Tang92f18ff2019-04-10 16:43:34 +080060#define SD_BOOTCOMMAND \
Yuantian Tang7f3da7b2019-11-04 15:10:45 +080061 "run sd_hdploadcmd; run distro_bootcmd;run sd_bootcmd; " \
62 "env exists secureboot && esbc_halt;"
63#define SD2_BOOTCOMMAND \
64 "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \
Yuantian Tang92f18ff2019-04-10 16:43:34 +080065 "env exists secureboot && esbc_halt;"
66
67/* Monitor Command Prompt */
68#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
69#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
70 sizeof(CONFIG_SYS_PROMPT) + 16)
71#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
72
Yuantian Tang92f18ff2019-04-10 16:43:34 +080073#define CONFIG_SYS_MAXARGS 64 /* max command args */
74
75#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
76
Yuantian Tang92f18ff2019-04-10 16:43:34 +080077#define OCRAM_NONSECURE_SIZE 0x00010000
Yuantian Tang92f18ff2019-04-10 16:43:34 +080078#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
Yuantian Tang92f18ff2019-04-10 16:43:34 +080079
80#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
81
Yuantian Tang92f18ff2019-04-10 16:43:34 +080082/* I2C bus multiplexer */
83#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
84#define I2C_MUX_CH_DEFAULT 0x8
85
86/* EEPROM */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080087#define CONFIG_SYS_I2C_EEPROM_NXID
88#define CONFIG_SYS_EEPROM_BUS_NUM 0
Yuantian Tang92f18ff2019-04-10 16:43:34 +080089
Wen He41e63db2019-11-18 13:26:09 +080090/* DisplayPort */
91#define DP_PWD_EN_DEFAULT_MASK 0x8
92
Udit Agarwal22ec2382019-11-07 16:11:32 +000093#ifdef CONFIG_NXP_ESBC
Yuantian Tang029d8ab2019-05-24 14:36:27 +080094#include <asm/fsl_secure_boot.h>
95#endif
96
Alex Marginean3a918732019-07-03 12:11:39 +030097/* Ethernet */
98/* smallest ENETC BD ring has 8 entries */
99#define CONFIG_SYS_RX_ETH_BUFFER 8
100
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800101#endif /* __L1028A_COMMON_H */