blob: d3d787f14d73cbc92b0d686a129063a5e05c62cb [file] [log] [blame]
Yuantian Tang92f18ff2019-04-10 16:43:34 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2019 NXP
4 */
5
6#ifndef __L1028A_COMMON_H
7#define __L1028A_COMMON_H
8
9#define CONFIG_REMAKE_ELF
10#define CONFIG_FSL_LAYERSCAPE
11#define CONFIG_MP
12
13#include <asm/arch/stream_id_lsch3.h>
14#include <asm/arch/config.h>
15#include <asm/arch/soc.h>
16
17/* Link Definitions */
18#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
19
20#define CONFIG_SKIP_LOWLEVEL_INIT
21
22#define CONFIG_VERY_BIG_RAM
23#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
24#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
25#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
26#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
27#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
28
29#define CONFIG_CMD_MEMTEST
30#define CONFIG_SYS_MEMTEST_START 0x80000000
31#define CONFIG_SYS_MEMTEST_END 0x9fffffff
32
33/*
34 * SMP Definitinos
35 */
36#define CPU_RELEASE_ADDR secondary_boot_func
37
38/* Generic Timer Definitions */
39#define COUNTER_FREQUENCY 25000000 /* 25MHz */
40
41/* Size of malloc() pool */
42#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
43
44/* I2C */
45#define CONFIG_SYS_I2C
46
47/* Serial Port */
48#define CONFIG_CONS_INDEX 1
49#define CONFIG_SYS_NS16550_SERIAL
50#define CONFIG_SYS_NS16550_REG_SIZE 1
51#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
52
53#define CONFIG_BAUDRATE 115200
54#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
55
56/* Miscellaneous configurable options */
57#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
58
59/* Physical Memory Map */
60#define CONFIG_CHIP_SELECTS_PER_CTRL 4
61
62#define CONFIG_HWCONFIG
63#define HWCONFIG_BUFFER_SIZE 128
64
65/* Allow to overwrite serial and ethaddr */
66#define CONFIG_ENV_OVERWRITE
67
68#define BOOT_TARGET_DEVICES(func) \
69 func(MMC, mmc, 0) \
70 func(USB, usb, 0)
71#include <config_distro_bootcmd.h>
72
73/* Initial environment variables */
74#define CONFIG_EXTRA_ENV_SETTINGS \
75 "board=ls1028ardb\0" \
76 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
77 "ramdisk_addr=0x800000\0" \
78 "ramdisk_size=0x2000000\0" \
79 "fdt_high=0xffffffffffffffff\0" \
80 "initrd_high=0xffffffffffffffff\0" \
81 "fdt_addr=0x00f00000\0" \
82 "kernel_addr=0x01000000\0" \
83 "scriptaddr=0x80000000\0" \
84 "scripthdraddr=0x80080000\0" \
85 "fdtheader_addr_r=0x80100000\0" \
86 "kernelheader_addr_r=0x80200000\0" \
87 "load_addr=0xa0000000\0" \
88 "kernel_addr_r=0x81000000\0" \
89 "fdt_addr_r=0x90000000\0" \
90 "ramdisk_addr_r=0xa0000000\0" \
91 "kernel_start=0x1000000\0" \
92 "kernelheader_start=0x800000\0" \
93 "kernel_load=0xa0000000\0" \
94 "kernel_size=0x2800000\0" \
95 "kernelheader_size=0x40000\0" \
96 "kernel_addr_sd=0x8000\0" \
97 "kernel_size_sd=0x14000\0" \
98 "kernelhdr_addr_sd=0x4000\0" \
99 "kernelhdr_size_sd=0x10\0" \
100 "console=ttyS0,115200\0" \
101 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
102 BOOTENV \
103 "boot_scripts=ls1028ardb_boot.scr\0" \
104 "boot_script_hdr=hdr_ls1028ardb_bs.out\0" \
105 "scan_dev_for_boot_part=" \
106 "part list ${devtype} ${devnum} devplist; " \
107 "env exists devplist || setenv devplist 1; " \
108 "for distro_bootpart in ${devplist}; do " \
109 "if fstype ${devtype} " \
110 "${devnum}:${distro_bootpart} " \
111 "bootfstype; then " \
112 "run scan_dev_for_boot; " \
113 "fi; " \
114 "done\0" \
115 "scan_dev_for_boot=" \
116 "echo Scanning ${devtype} " \
117 "${devnum}:${distro_bootpart}...; " \
118 "for prefix in ${boot_prefixes}; do " \
119 "run scan_dev_for_scripts; " \
120 "done;" \
121 "\0" \
122 "boot_a_script=" \
123 "load ${devtype} ${devnum}:${distro_bootpart} " \
124 "${scriptaddr} ${prefix}${script}; " \
125 "env exists secureboot && load ${devtype} " \
126 "${devnum}:${distro_bootpart} " \
127 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
128 "&& esbc_validate ${scripthdraddr};" \
129 "source ${scriptaddr}\0" \
130 "sd_bootcmd=echo Trying load from SD ..;" \
131 "mmcinfo; mmc read $load_addr " \
132 "$kernel_addr_sd $kernel_size_sd && " \
133 "env exists secureboot && mmc read $kernelheader_addr_r " \
134 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
135 " && esbc_validate ${kernelheader_addr_r};" \
136 "bootm $load_addr#$board\0" \
137 "emmc_bootcmd=echo Trying load from EMMC ..;" \
138 "mmcinfo; mmc dev 1; mmc read $load_addr " \
139 "$kernel_addr_sd $kernel_size_sd && " \
140 "env exists secureboot && mmc read $kernelheader_addr_r " \
141 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
142 " && esbc_validate ${kernelheader_addr_r};" \
143 "bootm $load_addr#$board\0"
144
145#undef CONFIG_BOOTCOMMAND
146
147#define SD_BOOTCOMMAND \
148 "run distro_bootcmd;run sd_bootcmd; " \
149 "env exists secureboot && esbc_halt;"
150
151/* Monitor Command Prompt */
152#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
153#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
154 sizeof(CONFIG_SYS_PROMPT) + 16)
155#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
156
157#ifndef CONFIG_CMDLINE_EDITING
158#define CONFIG_CMDLINE_EDITING 1
159#endif
160
161#define CONFIG_SYS_MAXARGS 64 /* max command args */
162
163#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
164
165/* MMC */
166#ifdef CONFIG_MMC
167#define CONFIG_FSL_ESDHC
168#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
169#endif
170
171#define CONFIG_SYS_MMC_ENV_DEV 0
172#define OCRAM_NONSECURE_SIZE 0x00010000
173#define CONFIG_ENV_OFFSET 0x500000 /* 5MB */
174#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
175#define CONFIG_ENV_ADDR CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET
176#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
177#define CONFIG_ENV_SECT_SIZE 0x40000
178
179#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
180
181/* MMC */
182#ifdef CONFIG_MMC
183#define CONFIG_FSL_ESDHC
184#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
185#endif
186
187/* I2C bus multiplexer */
188#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
189#define I2C_MUX_CH_DEFAULT 0x8
190
191/* EEPROM */
192#define CONFIG_ID_EEPROM
193#define CONFIG_SYS_I2C_EEPROM_NXID
194#define CONFIG_SYS_EEPROM_BUS_NUM 0
195#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
196#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
197#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
198#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
199
Yuantian Tang029d8ab2019-05-24 14:36:27 +0800200#ifdef CONFIG_SECURE_BOOT
201#include <asm/fsl_secure_boot.h>
202#endif
203
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800204#endif /* __L1028A_COMMON_H */