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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -06002/*
3 * Configuation settings for the Motorola MC5275EVB board.
4 *
5 * By Arthur Shipkowski <art@videon-central.com>
6 * Copyright (C) 2005 Videon Central, Inc.
7 *
8 * Based off of M5272C3 board code by Josef Baumgartner
9 * <josef.baumgartner@telex.de>
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060010 */
11
12/*
13 * board/config.h - configuration options, board specific
14 */
15
16#ifndef _M5275EVB_H
17#define _M5275EVB_H
18
19/*
20 * High Level Configuration Options
21 * (easy to change)
22 */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060023
24#define CONFIG_MCFTMR
25
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020026#define CONFIG_SYS_UART_PORT (0)
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060027
28/* Configuration for environment
29 * Environment is embedded in u-boot in the second sector of the flash
30 */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060031
angelo@sysam.it6312a952015-03-29 22:54:16 +020032#define LDS_BOARD_TEXT \
Simon Glass547cb402017-08-03 12:21:49 -060033 . = DEFINED(env_offset) ? env_offset : .; \
34 env/embedded.o(.text);
angelo@sysam.it6312a952015-03-29 22:54:16 +020035
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060036/*
37 * BOOTP options
38 */
39#define CONFIG_BOOTP_BOOTFILESIZE
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060040
41/* Available command configuration */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060042
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060043#ifdef CONFIG_MCFFEC
TsiChung Liewb3162452008-03-30 01:22:13 -050044#define CONFIG_MII_INIT 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020045#define CONFIG_SYS_DISCOVER_PHY
46#define CONFIG_SYS_RX_ETH_BUFFER 8
47#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060048#define CONFIG_HAS_ETH1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020049/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
50#ifndef CONFIG_SYS_DISCOVER_PHY
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060051#define FECDUPLEX FULL
52#define FECSPEED _100BASET
53#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020054#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
55#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060056#endif
57#endif
58#endif
59
60/* I2C */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020061#define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
62#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
63#define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060064
TsiChung Liew23cc28c2010-03-10 16:33:03 -060065#ifdef CONFIG_MCFFEC
66# define CONFIG_NET_RETRY_COUNT 5
67# define CONFIG_OVERWRITE_ETHADDR_ONCE
68#endif /* FEC_ENET */
69
70#define CONFIG_EXTRA_ENV_SETTINGS \
71 "netdev=eth0\0" \
72 "loadaddr=10000\0" \
73 "uboot=u-boot.bin\0" \
74 "load=tftp ${loadaddr} ${uboot}\0" \
75 "upd=run load; run prog\0" \
76 "prog=prot off ffe00000 ffe3ffff;" \
77 "era ffe00000 ffe3ffff;" \
78 "cp.b ${loadaddr} ffe00000 ${filesize};"\
79 "save\0" \
80 ""
81
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020082#define CONFIG_SYS_CLK 150000000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060083
84/*
85 * Low Level Configuration Settings
86 * (address mappings, register initial values, etc.)
87 * You should know what you are doing if you make changes here.
88 */
89
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020090#define CONFIG_SYS_MBAR 0x40000000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060091
92/*-----------------------------------------------------------------------
93 * Definitions for initial stack pointer and data area (in DPRAM)
94 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020095#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +020096#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
Wolfgang Denk0191e472010-10-26 14:34:52 +020097#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020098#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060099
100/*-----------------------------------------------------------------------
101 * Start addresses for the final memory configuration
102 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200103 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600104 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200105#define CONFIG_SYS_SDRAM_BASE 0x00000000
106#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
TsiChung Liew7f1a0462008-10-21 10:03:07 +0000107#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600108
109#ifdef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200110#define CONFIG_SYS_MONITOR_BASE 0x20000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600111#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200112#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600113#endif
114
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200115#define CONFIG_SYS_MONITOR_LEN 0x20000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200116#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600117
118/*
119 * For booting Linux, the board info and command line data
120 * have to be in the first 8 MB of memory, since this is
121 * the maximum mapped by the Linux kernel during initialization ??
122 */
TsiChung Liew25a00632009-01-27 12:57:47 +0000123#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
124#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600125
126/*-----------------------------------------------------------------------
127 * FLASH organization
128 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200129#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
130#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600131
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200132#define CONFIG_SYS_FLASH_SIZE 0x200000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600133
134/*-----------------------------------------------------------------------
135 * Cache Configuration
136 */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600137
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600138#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200139 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600140#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200141 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600142#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
143#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
144 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
145 CF_ACR_EN | CF_ACR_SM_ALL)
146#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
147 CF_CACR_DISD | CF_CACR_INVI | \
148 CF_CACR_CEIB | CF_CACR_DCM | \
149 CF_CACR_EUSP)
150
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600151/*-----------------------------------------------------------------------
152 * Memory bank definitions
153 */
TsiChung Liew7f1a0462008-10-21 10:03:07 +0000154#define CONFIG_SYS_CS0_BASE 0xffe00000
155#define CONFIG_SYS_CS0_CTRL 0x00001980
156#define CONFIG_SYS_CS0_MASK 0x001F0001
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600157
TsiChung Liew7f1a0462008-10-21 10:03:07 +0000158#define CONFIG_SYS_CS1_BASE 0x30000000
159#define CONFIG_SYS_CS1_CTRL 0x00001900
160#define CONFIG_SYS_CS1_MASK 0x00070001
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600161
162/*-----------------------------------------------------------------------
163 * Port configuration
164 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200165#define CONFIG_SYS_FECI2C 0x0FA0
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600166
167#endif /* _M5275EVB_H */