blob: b7406751838a400ee06ece35dab53e253f83bcd5 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Joe Hershberger911c6062011-11-11 15:55:37 -06002
3#ifndef _MPC83XX_GPIO_H_
4#define _MPC83XX_GPIO_H_
5
6/*
7 * The MCP83xx's 1-2 GPIO controllers each with 32 bits.
8 */
Tom Rinid9e6ef52021-05-14 21:34:27 -04009#if defined(CONFIG_ARCH_MPC8313) || defined(CONFIG_ARCH_MPC8308)
Joe Hershberger911c6062011-11-11 15:55:37 -060010#define MPC83XX_GPIO_CTRLRS 1
Rasmus Villemoesb0673182019-12-12 09:18:52 +000011#elif defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X) || \
12 defined(CONFIG_ARCH_MPC8309)
Joe Hershberger911c6062011-11-11 15:55:37 -060013#define MPC83XX_GPIO_CTRLRS 2
14#else
15#define MPC83XX_GPIO_CTRLRS 0
16#endif
17
18#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS)
19
Mario Six5dec9e62019-01-21 09:18:08 +010020struct mpc8xxx_gpio_plat {
21 ulong addr;
22 unsigned long size;
23 uint ngpios;
24};
25
26#ifndef DM_GPIO
Joe Hershberger911c6062011-11-11 15:55:37 -060027void mpc83xx_gpio_init_f(void);
28void mpc83xx_gpio_init_r(void);
Mario Six5dec9e62019-01-21 09:18:08 +010029#endif /* DM_GPIO */
Joe Hershberger911c6062011-11-11 15:55:37 -060030
31#endif /* MPC83XX_GPIO_H_ */