Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
Trevor Woerner | 2bcc1ed | 2020-05-06 08:02:42 -0400 | [diff] [blame] | 2 | CONFIG_ARCH_STM32=y |
Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 3 | CONFIG_TEXT_BASE=0x08009000 |
Tom Rini | e25a03a | 2021-11-01 12:19:22 +0000 | [diff] [blame] | 4 | CONFIG_SYS_MALLOC_LEN=0x100000 |
Patrice Chotard | d3e0deb | 2022-04-27 13:53:55 +0200 | [diff] [blame] | 5 | CONFIG_SPL_GPIO=y |
| 6 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
Tom Rini | 2e262c4 | 2020-08-10 15:31:07 -0400 | [diff] [blame] | 8 | CONFIG_NR_DRAM_BANKS=1 |
Tom Rini | 9924ca1 | 2023-02-17 09:58:06 -0500 | [diff] [blame] | 9 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 10 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 11 | CONFIG_ENV_SIZE=0x2000 |
Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 12 | CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" |
Tom Rini | 0332a1a | 2020-07-06 13:54:25 -0400 | [diff] [blame] | 13 | CONFIG_SPL_TEXT_BASE=0x8000000 |
Tom Rini | a77d6f8 | 2023-05-01 11:50:26 -0400 | [diff] [blame] | 14 | CONFIG_OF_LIBFDT_OVERLAY=y |
Tom Rini | 3d2b97c | 2023-05-29 10:43:26 -0400 | [diff] [blame] | 15 | CONFIG_SYS_MONITOR_LEN=524288 |
Patrice Chotard | d3e0deb | 2022-04-27 13:53:55 +0200 | [diff] [blame] | 16 | CONFIG_SPL_SERIAL=y |
| 17 | CONFIG_SPL_DRIVERS_MISC=y |
Patrice Chotard | d864acd | 2022-09-20 18:04:31 +0200 | [diff] [blame] | 18 | CONFIG_SPL_SIZE_LIMIT=0x9000 |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 19 | CONFIG_STM32F7=y |
| 20 | CONFIG_TARGET_STM32F746_DISCO=y |
Patrice Chotard | d3e0deb | 2022-04-27 13:53:55 +0200 | [diff] [blame] | 21 | CONFIG_SPL=y |
Patrice Chotard | d864acd | 2022-09-20 18:04:31 +0200 | [diff] [blame] | 22 | CONFIG_SYS_LOAD_ADDR=0x8009000 |
Tom Rini | 2e34053 | 2022-05-23 13:56:21 -0400 | [diff] [blame] | 23 | CONFIG_BUILD_TARGET="u-boot-with-spl.bin" |
Tom Rini | adb7a19 | 2023-03-27 13:39:17 -0400 | [diff] [blame] | 24 | CONFIG_DISTRO_DEFAULTS=y |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 25 | CONFIG_BOOTDELAY=3 |
Tom Rini | f92b6fa | 2020-10-09 12:22:06 -0400 | [diff] [blame] | 26 | CONFIG_AUTOBOOT_KEYED=y |
| 27 | CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" |
| 28 | CONFIG_AUTOBOOT_STOP_STR=" " |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 29 | CONFIG_USE_BOOTARGS=y |
| 30 | CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 31 | # CONFIG_DISPLAY_CPUINFO is not set |
Patrice Chotard | d864acd | 2022-09-20 18:04:31 +0200 | [diff] [blame] | 32 | CONFIG_SPL_PAD_TO=0x9000 |
Tom Rini | 0cb89e7 | 2022-05-19 15:09:22 -0400 | [diff] [blame] | 33 | CONFIG_SPL_NO_BSS_LIMIT=y |
Patrice Chotard | d3e0deb | 2022-04-27 13:53:55 +0200 | [diff] [blame] | 34 | CONFIG_SPL_BOARD_INIT=y |
| 35 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
| 36 | CONFIG_SPL_MTD_SUPPORT=y |
| 37 | CONFIG_SPL_XIP_SUPPORT=y |
Tom Rini | 2c9d2b5 | 2022-05-27 22:06:52 -0400 | [diff] [blame] | 38 | CONFIG_SYS_SPL_ARGS_ADDR=0x81c0000 |
Patrice Chotard | d3e0deb | 2022-04-27 13:53:55 +0200 | [diff] [blame] | 39 | CONFIG_SPL_DM_RESET=y |
Tom Rini | c435985 | 2023-10-02 10:35:27 -0400 | [diff] [blame] | 40 | CONFIG_SYS_PROMPT="U-Boot > " |
Tom Rini | cbfa139 | 2022-05-11 17:38:09 -0400 | [diff] [blame] | 41 | CONFIG_SYS_PBSIZE=1050 |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 42 | CONFIG_CMD_GPT=y |
| 43 | # CONFIG_RANDOM_UUID is not set |
| 44 | CONFIG_CMD_MMC=y |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 45 | # CONFIG_CMD_SETEXPR is not set |
| 46 | CONFIG_CMD_SNTP=y |
| 47 | CONFIG_CMD_DNS=y |
| 48 | CONFIG_CMD_LINK_LOCAL=y |
| 49 | CONFIG_CMD_BMP=y |
| 50 | CONFIG_CMD_CACHE=y |
| 51 | CONFIG_CMD_TIMER=y |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 52 | # CONFIG_ISO_PARTITION is not set |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 53 | CONFIG_OF_CONTROL=y |
Patrice Chotard | d3e0deb | 2022-04-27 13:53:55 +0200 | [diff] [blame] | 54 | CONFIG_SPL_OF_CONTROL=y |
Tom Rini | ca63e71 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 55 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 56 | CONFIG_NET_RANDOM_ETHADDR=y |
| 57 | CONFIG_NETCONSOLE=y |
Patrice Chotard | d3e0deb | 2022-04-27 13:53:55 +0200 | [diff] [blame] | 58 | CONFIG_SPL_DM=y |
| 59 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| 60 | CONFIG_SPL_OF_TRANSLATE=y |
| 61 | CONFIG_SPL_CLK=y |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 62 | CONFIG_ARM_PL180_MMCI=y |
Tom Rini | e799f92 | 2019-12-04 17:18:38 -0500 | [diff] [blame] | 63 | CONFIG_MTD=y |
Miquel Raynal | a903be4 | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 64 | CONFIG_DM_MTD=y |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 65 | CONFIG_MTD_NOR_FLASH=y |
Patrick Delaunay | 754ff3b | 2021-10-04 11:05:52 +0200 | [diff] [blame] | 66 | CONFIG_STM32_FLASH=y |
Patrice Chotard | f3cf5b1 | 2022-09-20 18:04:35 +0200 | [diff] [blame] | 67 | CONFIG_SYS_MAX_FLASH_SECT=12 |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 68 | CONFIG_DM_SPI_FLASH=y |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 69 | CONFIG_SPI_FLASH_MACRONIX=y |
| 70 | CONFIG_SPI_FLASH_STMICRO=y |
Tom Rini | 5d15419 | 2020-04-24 15:35:53 -0400 | [diff] [blame] | 71 | CONFIG_PHY_SMSC=y |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 72 | CONFIG_ETH_DESIGNWARE=y |
Tom Rini | 7ac21a3 | 2022-06-15 12:03:43 -0400 | [diff] [blame] | 73 | CONFIG_DW_ALTDESCRIPTOR=y |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 74 | CONFIG_MII=y |
| 75 | # CONFIG_PINCTRL_FULL is not set |
Patrice Chotard | d3e0deb | 2022-04-27 13:53:55 +0200 | [diff] [blame] | 76 | CONFIG_SPL_PINCTRL=y |
Tom Rini | 1697038 | 2022-09-19 11:22:26 -0400 | [diff] [blame] | 77 | CONFIG_DM_REGULATOR=y |
Patrice Chotard | d3e0deb | 2022-04-27 13:53:55 +0200 | [diff] [blame] | 78 | CONFIG_SPL_RAM=y |
| 79 | CONFIG_SPECIFY_CONSOLE_INDEX=y |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 80 | CONFIG_SPI=y |
| 81 | CONFIG_DM_SPI=y |
| 82 | CONFIG_STM32_QSPI=y |
Patrice Chotard | d3e0deb | 2022-04-27 13:53:55 +0200 | [diff] [blame] | 83 | CONFIG_SPL_TIMER=y |
Simon Glass | 52cb504 | 2022-10-18 07:46:31 -0600 | [diff] [blame] | 84 | CONFIG_VIDEO=y |
Patrice Chotard | d62af8a | 2023-08-25 18:24:39 +0200 | [diff] [blame^] | 85 | CONFIG_VIDEO_LOGO=y |
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 86 | CONFIG_BACKLIGHT_GPIO=y |
Yannick Fertré | b495e13 | 2019-10-07 15:29:10 +0200 | [diff] [blame] | 87 | CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y |
| 88 | CONFIG_VIDEO_STM32=y |
| 89 | CONFIG_VIDEO_STM32_DSI=y |
| 90 | CONFIG_VIDEO_STM32_MAX_XRES=480 |
| 91 | CONFIG_VIDEO_STM32_MAX_YRES=800 |
Simon Glass | 2d7a794 | 2020-08-11 11:23:35 -0600 | [diff] [blame] | 92 | CONFIG_SPLASH_SCREEN=y |
| 93 | CONFIG_SPLASH_SCREEN_ALIGN=y |
Patrick Delaunay | b1f1763 | 2020-09-28 11:30:16 +0200 | [diff] [blame] | 94 | CONFIG_BMP_16BPP=y |
| 95 | CONFIG_BMP_24BPP=y |
| 96 | CONFIG_BMP_32BPP=y |