blob: 72175f719df1e9e3b6d5f8da8591bf965b77e325 [file] [log] [blame]
Yannick Fertréb495e132019-10-07 15:29:10 +02001CONFIG_ARM=y
Trevor Woerner2bcc1ed2020-05-06 08:02:42 -04002CONFIG_ARCH_STM32=y
Yannick Fertréb495e132019-10-07 15:29:10 +02003CONFIG_SYS_TEXT_BASE=0x08008000
Tom Rinie25a03a2021-11-01 12:19:22 +00004CONFIG_SYS_MALLOC_LEN=0x100000
Yannick Fertréb495e132019-10-07 15:29:10 +02005CONFIG_SYS_MALLOC_F_LEN=0xE00
Patrice Chotardd3e0deb2022-04-27 13:53:55 +02006CONFIG_SPL_GPIO=y
7CONFIG_SPL_LIBCOMMON_SUPPORT=y
8CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -04009CONFIG_NR_DRAM_BANKS=1
Tom Rini5cd7ece2019-11-18 20:02:10 -050010CONFIG_ENV_SIZE=0x2000
Tom Rinia20e51f2021-06-28 10:17:29 -040011CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco"
Tom Rini0332a1a2020-07-06 13:54:25 -040012CONFIG_SPL_TEXT_BASE=0x8000000
Patrice Chotardd3e0deb2022-04-27 13:53:55 +020013CONFIG_SPL_SERIAL=y
14CONFIG_SPL_DRIVERS_MISC=y
Yannick Fertréb495e132019-10-07 15:29:10 +020015CONFIG_STM32F7=y
16CONFIG_TARGET_STM32F746_DISCO=y
Patrice Chotardd3e0deb2022-04-27 13:53:55 +020017CONFIG_SPL=y
Tom Rini0997ee02021-08-23 10:25:31 -040018CONFIG_SYS_LOAD_ADDR=0x8008000
Tom Rini2e340532022-05-23 13:56:21 -040019CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
Tom Rini4b2fcb32022-04-08 13:36:51 -040020CONFIG_DISTRO_DEFAULTS=y
Yannick Fertréb495e132019-10-07 15:29:10 +020021CONFIG_BOOTDELAY=3
Tom Rinif92b6fa2020-10-09 12:22:06 -040022CONFIG_AUTOBOOT_KEYED=y
23CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
24CONFIG_AUTOBOOT_STOP_STR=" "
Yannick Fertréb495e132019-10-07 15:29:10 +020025CONFIG_USE_BOOTARGS=y
26CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
Yannick Fertréb495e132019-10-07 15:29:10 +020027# CONFIG_DISPLAY_CPUINFO is not set
Tom Riniabb0f522022-05-16 17:20:26 -040028CONFIG_SPL_PAD_TO=0x8000
Tom Rini0cb89e72022-05-19 15:09:22 -040029CONFIG_SPL_NO_BSS_LIMIT=y
Patrice Chotardd3e0deb2022-04-27 13:53:55 +020030CONFIG_SPL_BOARD_INIT=y
31CONFIG_SPL_SYS_MALLOC_SIMPLE=y
32CONFIG_SPL_MTD_SUPPORT=y
33CONFIG_SPL_XIP_SUPPORT=y
34CONFIG_SPL_DM_RESET=y
Yannick Fertréb495e132019-10-07 15:29:10 +020035CONFIG_SYS_PROMPT="U-Boot > "
Tom Rinicbfa1392022-05-11 17:38:09 -040036CONFIG_SYS_PBSIZE=1050
Yannick Fertréb495e132019-10-07 15:29:10 +020037CONFIG_CMD_GPT=y
38# CONFIG_RANDOM_UUID is not set
39CONFIG_CMD_MMC=y
Yannick Fertréb495e132019-10-07 15:29:10 +020040# CONFIG_CMD_SETEXPR is not set
41CONFIG_CMD_SNTP=y
42CONFIG_CMD_DNS=y
43CONFIG_CMD_LINK_LOCAL=y
44CONFIG_CMD_BMP=y
45CONFIG_CMD_CACHE=y
46CONFIG_CMD_TIMER=y
Yannick Fertréb495e132019-10-07 15:29:10 +020047# CONFIG_ISO_PARTITION is not set
Yannick Fertréb495e132019-10-07 15:29:10 +020048CONFIG_OF_CONTROL=y
Patrice Chotardd3e0deb2022-04-27 13:53:55 +020049CONFIG_SPL_OF_CONTROL=y
Tom Rinica63e712019-11-12 22:46:36 -050050CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Yannick Fertréb495e132019-10-07 15:29:10 +020051CONFIG_NET_RANDOM_ETHADDR=y
52CONFIG_NETCONSOLE=y
Patrice Chotardd3e0deb2022-04-27 13:53:55 +020053CONFIG_SPL_DM=y
54CONFIG_SPL_DM_SEQ_ALIAS=y
55CONFIG_SPL_OF_TRANSLATE=y
56CONFIG_SPL_CLK=y
Yannick Fertréb495e132019-10-07 15:29:10 +020057CONFIG_ARM_PL180_MMCI=y
Tom Rinie799f922019-12-04 17:18:38 -050058CONFIG_MTD=y
Miquel Raynala903be42019-10-03 19:50:04 +020059CONFIG_DM_MTD=y
Yannick Fertréb495e132019-10-07 15:29:10 +020060CONFIG_MTD_NOR_FLASH=y
Patrick Delaunay754ff3b2021-10-04 11:05:52 +020061CONFIG_STM32_FLASH=y
Yannick Fertréb495e132019-10-07 15:29:10 +020062CONFIG_DM_SPI_FLASH=y
Yannick Fertréb495e132019-10-07 15:29:10 +020063CONFIG_SPI_FLASH_MACRONIX=y
64CONFIG_SPI_FLASH_STMICRO=y
Tom Rini5d154192020-04-24 15:35:53 -040065CONFIG_PHY_SMSC=y
Yannick Fertréb495e132019-10-07 15:29:10 +020066CONFIG_DM_ETH=y
67CONFIG_ETH_DESIGNWARE=y
68CONFIG_MII=y
69# CONFIG_PINCTRL_FULL is not set
Patrice Chotardd3e0deb2022-04-27 13:53:55 +020070CONFIG_SPL_PINCTRL=y
71CONFIG_SPL_RAM=y
72CONFIG_SPECIFY_CONSOLE_INDEX=y
Yannick Fertréb495e132019-10-07 15:29:10 +020073CONFIG_SPI=y
74CONFIG_DM_SPI=y
75CONFIG_STM32_QSPI=y
Patrice Chotardd3e0deb2022-04-27 13:53:55 +020076CONFIG_SPL_TIMER=y
Yannick Fertréb495e132019-10-07 15:29:10 +020077CONFIG_DM_VIDEO=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -050078CONFIG_BACKLIGHT_GPIO=y
Yannick Fertréb495e132019-10-07 15:29:10 +020079CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
80CONFIG_VIDEO_STM32=y
81CONFIG_VIDEO_STM32_DSI=y
82CONFIG_VIDEO_STM32_MAX_XRES=480
83CONFIG_VIDEO_STM32_MAX_YRES=800
Simon Glass2d7a7942020-08-11 11:23:35 -060084CONFIG_SPLASH_SCREEN=y
85CONFIG_SPLASH_SCREEN_ALIGN=y
Patrick Delaunayc47fe772020-09-28 11:30:15 +020086CONFIG_VIDEO_BMP_RLE8=y
Patrick Delaunayb1f17632020-09-28 11:30:16 +020087CONFIG_BMP_16BPP=y
88CONFIG_BMP_24BPP=y
89CONFIG_BMP_32BPP=y
Yannick Fertréb495e132019-10-07 15:29:10 +020090CONFIG_OF_LIBFDT_OVERLAY=y