Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / d5939a6c03907adfb533aca234e6b9d4f4c9aa1e / . / arch / arm / dts / fsl-ls2080a-qds.dts
blob: fbd6c78e9fdd6f0e896f0cf5e8bf9c8c6abea71b [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ OR X11
Haikun Wang94c21bb2015-06-26 19:48:58 +0800[diff] [blame]2/*
Prabhakar Kushwaha122bcfd2015-11-09 16:42:07 +0530[diff] [blame]3 * Freescale ls2080a QDS board device tree source
Haikun Wang94c21bb2015-06-26 19:48:58 +0800[diff] [blame]4 *
5 * Copyright 2013-2015 Freescale Semiconductor, Inc.
Haikun Wang94c21bb2015-06-26 19:48:58 +0800[diff] [blame]6 */
7
8/dts-v1/;
9
Prabhakar Kushwaha122bcfd2015-11-09 16:42:07 +0530[diff] [blame]10#include "fsl-ls2080a.dtsi"
Haikun Wang94c21bb2015-06-26 19:48:58 +0800[diff] [blame]11
12/ {
Prabhakar Kushwaha122bcfd2015-11-09 16:42:07 +0530[diff] [blame]13 model = "Freescale Layerscape 2080a QDS Board";
14 compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
Haikun Wang94c21bb2015-06-26 19:48:58 +0800[diff] [blame]15
16 aliases {
Yuan Yaob42bbc22016-06-08 18:24:56 +0800[diff] [blame]17 spi0 = &qspi;
Haikun Wang94c21bb2015-06-26 19:48:58 +0800[diff] [blame]18 spi1 = &dspi;
19 };
20};
21
22&dspi {
23 bus-num = <0>;
24 status = "okay";
25
26 dflash0: n25q128a {
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "spi-flash";
30 spi-max-frequency = <3000000>;
31 spi-cpol;
32 spi-cpha;
33 reg = <0>;
34 };
35 dflash1: sst25wf040b {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "spi-flash";
39 spi-max-frequency = <3000000>;
40 spi-cpol;
41 spi-cpha;
42 reg = <1>;
43 };
44 dflash2: en25s64 {
45 #address-cells = <1>;
46 #size-cells = <1>;
47 compatible = "spi-flash";
48 spi-max-frequency = <3000000>;
49 spi-cpol;
50 spi-cpha;
51 reg = <2>;
52 };
53};
Yuan Yaob42bbc22016-06-08 18:24:56 +0800[diff] [blame]54
55&qspi {
56 bus-num = <0>;
57 status = "okay";
58
59 qflash0: s25fs256s@0 {
60 #address-cells = <1>;
61 #size-cells = <1>;
62 compatible = "spi-flash";
63 spi-max-frequency = <20000000>;
64 reg = <0>;
65 };
66};