blob: f6cf3c228e64de219cc6ad136957079b75951a78 [file] [log] [blame]
Michal Simek4b066a12018-08-22 14:55:27 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2014 - 2018 Xilinx, Inc.
Michal Simeka8c94362023-07-10 14:35:49 +02004 * Michal Simek <michal.simek@amd.com>
Michal Simek4b066a12018-08-22 14:55:27 +02005 */
6
Algapally Santosh Sagar3c351b22023-01-19 22:36:16 -07007#include <command.h>
Simon Glassafb02152019-12-28 10:45:01 -07008#include <cpu_func.h>
Venkatesh Yadav Abbarapu88990e92025-01-06 14:36:30 +05309#include <dfu.h>
Simon Glassed38aef2020-05-10 11:40:03 -060010#include <env.h>
Michal Simek806be2d2025-02-26 16:35:45 -060011#include <efi_loader.h>
Michal Simek4b066a12018-08-22 14:55:27 +020012#include <fdtdec.h>
Simon Glassa7b51302019-11-14 12:57:46 -070013#include <init.h>
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -070014#include <env_internal.h>
Simon Glass0f2af882020-05-10 11:40:05 -060015#include <log.h>
Michal Simek4b066a12018-08-22 14:55:27 +020016#include <malloc.h>
Michal Simek444a70e2024-10-25 13:56:08 +020017#include <memalign.h>
18#include <mmc.h>
Michal Simek754b53c2024-12-05 11:38:15 +010019#include <mtd.h>
Simon Glass495a5dc2019-11-14 12:57:30 -070020#include <time.h>
Simon Glass274e0b02020-05-10 11:39:56 -060021#include <asm/cache.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060022#include <asm/global_data.h>
Michal Simek4b066a12018-08-22 14:55:27 +020023#include <asm/io.h>
24#include <asm/arch/hardware.h>
Michal Simek21eb5cc2019-04-29 09:39:09 -070025#include <asm/arch/sys_proto.h>
Michal Simek444a70e2024-10-25 13:56:08 +020026#include <linux/sizes.h>
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +053027#include <dm/device.h>
28#include <dm/uclass.h>
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053029#include <versalpl.h>
Prasad Kummari011a7462025-02-19 17:23:01 +053030#include <zynqmp_firmware.h>
Michal Simek705d44a2020-03-31 12:39:37 +020031#include "../common/board.h"
Michal Simek4b066a12018-08-22 14:55:27 +020032
33DECLARE_GLOBAL_DATA_PTR;
34
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053035#if defined(CONFIG_FPGA_VERSALPL)
Oleksandr Suvorovdae95a42022-07-22 17:16:04 +030036static xilinx_desc versalpl = {
37 xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op, NULL,
38 FPGA_LEGACY
39};
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053040#endif
41
Michal Simekfec54762025-01-06 10:20:40 +010042static u8 versal_get_bootmode(void)
43{
44 u8 bootmode;
45 u32 reg = 0;
46
Prasad Kummari011a7462025-02-19 17:23:01 +053047 if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE) && current_el() != 3) {
48 reg = zynqmp_pm_get_bootmode_reg();
49 } else {
50 reg = readl(&crp_base->boot_mode_usr);
51 }
Michal Simekfec54762025-01-06 10:20:40 +010052
53 if (reg >> BOOT_MODE_ALT_SHIFT)
54 reg >>= BOOT_MODE_ALT_SHIFT;
55
56 bootmode = reg & BOOT_MODES_MASK;
57
58 return bootmode;
59}
60
Michal Simek76fdafa2024-12-05 11:38:16 +010061static u32 versal_multi_boot(void)
62{
Michal Simekfec54762025-01-06 10:20:40 +010063 u8 bootmode = versal_get_bootmode();
64
65 /* Mostly workaround for QEMU CI pipeline */
66 if (bootmode == JTAG_MODE)
67 return 0;
68
Michal Simek76fdafa2024-12-05 11:38:16 +010069 return readl(0xF1110004);
70}
71
Michal Simek4b066a12018-08-22 14:55:27 +020072int board_init(void)
73{
74 printf("EL Level:\tEL%d\n", current_el());
Michal Simek76fdafa2024-12-05 11:38:16 +010075 printf("Multiboot:\t%d\n", versal_multi_boot());
Michal Simek4b066a12018-08-22 14:55:27 +020076
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053077#if defined(CONFIG_FPGA_VERSALPL)
78 fpga_init();
79 fpga_add(fpga_xilinx, &versalpl);
80#endif
81
Michal Simek394ee242020-08-03 13:01:45 +020082 if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM))
83 xilinx_read_eeprom();
84
Michal Simek4b066a12018-08-22 14:55:27 +020085 return 0;
86}
87
88int board_early_init_r(void)
89{
Michal Simek19f6c972019-01-28 11:08:00 +010090 u32 val;
Michal Simek4b066a12018-08-22 14:55:27 +020091
Michal Simek19f6c972019-01-28 11:08:00 +010092 if (current_el() != 3)
93 return 0;
Michal Simek4b066a12018-08-22 14:55:27 +020094
Michal Simekf56f7d12019-01-28 11:12:41 +010095 debug("iou_switch ctrl div0 %x\n",
96 readl(&crlapb_base->iou_switch_ctrl));
97
Michal Simek19f6c972019-01-28 11:08:00 +010098 writel(IOU_SWITCH_CTRL_CLKACT_BIT |
Michal Simekf56f7d12019-01-28 11:12:41 +010099 (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
Michal Simek19f6c972019-01-28 11:08:00 +0100100 &crlapb_base->iou_switch_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +0200101
Michal Simek19f6c972019-01-28 11:08:00 +0100102 /* Global timer init - Program time stamp reference clk */
103 val = readl(&crlapb_base->timestamp_ref_ctrl);
104 val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
105 writel(val, &crlapb_base->timestamp_ref_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +0200106
Michal Simek19f6c972019-01-28 11:08:00 +0100107 debug("ref ctrl 0x%x\n",
108 readl(&crlapb_base->timestamp_ref_ctrl));
Michal Simek4b066a12018-08-22 14:55:27 +0200109
Michal Simek19f6c972019-01-28 11:08:00 +0100110 /* Clear reset of timestamp reg */
111 writel(0, &crlapb_base->rst_timestamp);
Michal Simek4b066a12018-08-22 14:55:27 +0200112
Michal Simek19f6c972019-01-28 11:08:00 +0100113 /*
114 * Program freq register in System counter and
115 * enable system counter.
116 */
Peng Fan4b3a1822022-04-13 17:47:17 +0800117 writel(CONFIG_COUNTER_FREQUENCY,
Michal Simek19f6c972019-01-28 11:08:00 +0100118 &iou_scntr_secure->base_frequency_id_register);
Michal Simek4b066a12018-08-22 14:55:27 +0200119
Michal Simek19f6c972019-01-28 11:08:00 +0100120 debug("counter val 0x%x\n",
121 readl(&iou_scntr_secure->base_frequency_id_register));
122
123 writel(IOU_SCNTRS_CONTROL_EN,
124 &iou_scntr_secure->counter_control_register);
Michal Simek4b066a12018-08-22 14:55:27 +0200125
Michal Simek19f6c972019-01-28 11:08:00 +0100126 debug("scntrs control 0x%x\n",
127 readl(&iou_scntr_secure->counter_control_register));
128 debug("timer 0x%llx\n", get_ticks());
129 debug("timer 0x%llx\n", get_ticks());
Michal Simek4b066a12018-08-22 14:55:27 +0200130
131 return 0;
132}
133
Ashok Reddy Soma6c191052022-05-05 23:53:45 -0600134unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
135 char *const argv[])
136{
137 int ret = 0;
138
139 if (current_el() > 1) {
140 smp_kick_all_cpus();
141 dcache_disable();
142 armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry,
143 ES_TO_AARCH64);
144 } else {
145 printf("FAIL: current EL is not above EL1\n");
146 ret = EINVAL;
147 }
148 return ret;
149}
150
Michal Simekb1634762023-09-05 13:30:07 +0200151static int boot_targets_setup(void)
Michal Simek9c91e612020-04-08 11:04:41 +0200152{
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530153 u8 bootmode;
154 struct udevice *dev;
155 int bootseq = -1;
156 int bootseq_len = 0;
157 int env_targets_len = 0;
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530158 const char *mode = NULL;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530159 char *new_targets;
160 char *env_targets;
161
Michal Simek9c91e612020-04-08 11:04:41 +0200162 bootmode = versal_get_bootmode();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530163
164 puts("Bootmode: ");
165 switch (bootmode) {
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530166 case USB_MODE:
167 puts("USB_MODE\n");
T Karthik Reddy1104faf2021-03-30 23:24:57 -0600168 mode = "usb_dfu0 usb_dfu1";
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530169 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530170 case JTAG_MODE:
171 puts("JTAG_MODE\n");
Siva Durga Prasad Paladugu00784e02019-06-25 17:13:14 +0530172 mode = "jtag pxe dhcp";
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530173 break;
174 case QSPI_MODE_24BIT:
175 puts("QSPI_MODE_24\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200176 if (uclass_get_device_by_name(UCLASS_SPI,
177 "spi@f1030000", &dev)) {
178 debug("QSPI driver for QSPI device is not present\n");
179 break;
180 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530181 mode = "xspi0";
182 break;
183 case QSPI_MODE_32BIT:
184 puts("QSPI_MODE_32\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200185 if (uclass_get_device_by_name(UCLASS_SPI,
186 "spi@f1030000", &dev)) {
187 debug("QSPI driver for QSPI device is not present\n");
188 break;
189 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530190 mode = "xspi0";
191 break;
192 case OSPI_MODE:
193 puts("OSPI_MODE\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200194 if (uclass_get_device_by_name(UCLASS_SPI,
195 "spi@f1010000", &dev)) {
196 debug("OSPI driver for OSPI device is not present\n");
197 break;
198 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530199 mode = "xspi0";
200 break;
201 case EMMC_MODE:
202 puts("EMMC_MODE\n");
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700203 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100204 "mmc@f1050000", &dev) &&
205 uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700206 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530207 debug("SD1 driver for SD1 device is not present\n");
208 break;
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700209 }
Simon Glass75e534b2020-12-16 21:20:07 -0700210 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700211 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700212 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530213 break;
Polak, Leszekcddfc132023-10-08 14:34:42 +0000214 case SELECTMAP_MODE:
215 puts("SELECTMAP_MODE\n");
216 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530217 case SD_MODE:
218 puts("SD_MODE\n");
219 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100220 "mmc@f1040000", &dev) &&
221 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530222 "sdhci@f1040000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530223 debug("SD0 driver for SD0 device is not present\n");
224 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530225 }
Simon Glass75e534b2020-12-16 21:20:07 -0700226 debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530227
228 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700229 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530230 break;
231 case SD1_LSHFT_MODE:
232 puts("LVL_SHFT_");
233 /* fall through */
234 case SD_MODE1:
235 puts("SD_MODE1\n");
236 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100237 "mmc@f1050000", &dev) &&
238 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530239 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530240 debug("SD1 driver for SD1 device is not present\n");
241 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530242 }
Simon Glass75e534b2020-12-16 21:20:07 -0700243 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530244
245 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700246 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530247 break;
248 default:
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530249 printf("Invalid Boot Mode:0x%x\n", bootmode);
250 break;
251 }
252
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530253 if (mode) {
254 if (bootseq >= 0) {
255 bootseq_len = snprintf(NULL, 0, "%i", bootseq);
256 debug("Bootseq len: %x\n", bootseq_len);
257 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530258
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530259 /*
260 * One terminating char + one byte for space between mode
261 * and default boot_targets
262 */
263 env_targets = env_get("boot_targets");
264 if (env_targets)
265 env_targets_len = strlen(env_targets);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530266
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530267 new_targets = calloc(1, strlen(mode) + env_targets_len + 2 +
268 bootseq_len);
269 if (!new_targets)
270 return -ENOMEM;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530271
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530272 if (bootseq >= 0)
273 sprintf(new_targets, "%s%x %s", mode, bootseq,
274 env_targets ? env_targets : "");
275 else
276 sprintf(new_targets, "%s %s", mode,
277 env_targets ? env_targets : "");
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530278
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530279 env_set("boot_targets", new_targets);
280 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530281
Michal Simekb1634762023-09-05 13:30:07 +0200282 return 0;
283}
284
285int board_late_init(void)
286{
287 int ret;
288
Jonathan Humphreys531eb602025-02-26 16:35:47 -0600289 if (IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT))
290 configure_capsule_updates();
291
Michal Simekb1634762023-09-05 13:30:07 +0200292 if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
293 debug("Saved variables - Skipping\n");
294 return 0;
295 }
296
297 if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
298 return 0;
299
300 if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) {
301 ret = boot_targets_setup();
302 if (ret)
303 return ret;
304 }
305
Michal Simek705d44a2020-03-31 12:39:37 +0200306 return board_late_init_xilinx();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530307}
308
Michal Simek4b066a12018-08-22 14:55:27 +0200309int dram_init_banksize(void)
310{
Michal Simek21eb5cc2019-04-29 09:39:09 -0700311 int ret;
312
313 ret = fdtdec_setup_memory_banksize();
314 if (ret)
315 return ret;
316
317 mem_map_fill();
Michal Simek4b066a12018-08-22 14:55:27 +0200318
319 return 0;
320}
321
322int dram_init(void)
323{
Michal Simek9134d4c2020-07-10 12:42:09 +0200324 if (fdtdec_setup_mem_size_base_lowest() != 0)
Michal Simek4b066a12018-08-22 14:55:27 +0200325 return -EINVAL;
326
327 return 0;
328}
329
Michal Simekc1e98aa2024-10-25 13:56:07 +0200330#if !CONFIG_IS_ENABLED(SYSRESET)
Harald Seiler6f14d5f2020-12-15 16:47:52 +0100331void reset_cpu(void)
Michal Simek4b066a12018-08-22 14:55:27 +0200332{
333}
Michal Simekc1e98aa2024-10-25 13:56:07 +0200334#endif
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700335
Michal Simekf3a541f2024-03-22 12:43:17 +0100336#if defined(CONFIG_ENV_IS_NOWHERE)
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700337enum env_location env_get_location(enum env_operation op, int prio)
338{
339 u32 bootmode = versal_get_bootmode();
340
341 if (prio)
342 return ENVL_UNKNOWN;
343
344 switch (bootmode) {
345 case EMMC_MODE:
346 case SD_MODE:
347 case SD1_LSHFT_MODE:
348 case SD_MODE1:
349 if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
350 return ENVL_FAT;
351 if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
352 return ENVL_EXT4;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100353 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700354 case OSPI_MODE:
355 case QSPI_MODE_24BIT:
356 case QSPI_MODE_32BIT:
357 if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
358 return ENVL_SPI_FLASH;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100359 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700360 case JTAG_MODE:
Polak, Leszekcddfc132023-10-08 14:34:42 +0000361 case SELECTMAP_MODE:
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700362 default:
363 return ENVL_NOWHERE;
364 }
365}
Michal Simekf3a541f2024-03-22 12:43:17 +0100366#endif
Michal Simek444a70e2024-10-25 13:56:08 +0200367
Michal Simek444a70e2024-10-25 13:56:08 +0200368#define DFU_ALT_BUF_LEN SZ_1K
369
Michal Simek754b53c2024-12-05 11:38:15 +0100370static void mtd_found_part(u32 *base, u32 *size)
371{
372 struct mtd_info *part, *mtd;
373
374 mtd_probe_devices();
375
376 mtd = get_mtd_device_nm("nor0");
377 if (!IS_ERR_OR_NULL(mtd)) {
378 list_for_each_entry(part, &mtd->partitions, node) {
379 debug("0x%012llx-0x%012llx : \"%s\"\n",
380 part->offset, part->offset + part->size,
381 part->name);
382
383 if (*base >= part->offset &&
384 *base < part->offset + part->size) {
385 debug("Found my partition: %d/%s\n",
386 part->index, part->name);
387 *base = part->offset;
388 *size = part->size;
389 break;
390 }
391 }
392 }
393}
394
Jonathan Humphreys531eb602025-02-26 16:35:47 -0600395void configure_capsule_updates(void)
Michal Simek444a70e2024-10-25 13:56:08 +0200396{
397 int bootseq = 0, len = 0;
Michal Simek76fdafa2024-12-05 11:38:16 +0100398 u32 multiboot = versal_multi_boot();
Michal Simek444a70e2024-10-25 13:56:08 +0200399 u32 bootmode = versal_get_bootmode();
400
401 ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
402
Michal Simek444a70e2024-10-25 13:56:08 +0200403 memset(buf, 0, sizeof(buf));
404
Michal Simek76fdafa2024-12-05 11:38:16 +0100405 multiboot = env_get_hex("multiboot", multiboot);
406
Michal Simek444a70e2024-10-25 13:56:08 +0200407 switch (bootmode) {
408 case EMMC_MODE:
409 case SD_MODE:
410 case SD1_LSHFT_MODE:
411 case SD_MODE1:
412 bootseq = mmc_get_env_dev();
413
414 len += snprintf(buf + len, DFU_ALT_BUF_LEN, "mmc %d=boot",
415 bootseq);
416
Michal Simek76fdafa2024-12-05 11:38:16 +0100417 if (multiboot)
418 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
419 "%04d", multiboot);
420
Michal Simek444a70e2024-10-25 13:56:08 +0200421 len += snprintf(buf + len, DFU_ALT_BUF_LEN, ".bin fat %d 1",
422 bootseq);
423 break;
Michal Simek754b53c2024-12-05 11:38:15 +0100424 case QSPI_MODE_24BIT:
425 case QSPI_MODE_32BIT:
426 case OSPI_MODE:
427 {
Michal Simek76fdafa2024-12-05 11:38:16 +0100428 u32 base = multiboot * SZ_32K;
Michal Simek754b53c2024-12-05 11:38:15 +0100429 u32 size = 0x1500000;
430 u32 limit = size;
431
432 mtd_found_part(&base, &limit);
433
434 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
435 "sf 0:0=boot.bin raw 0x%x 0x%x",
436 base, limit);
437 }
438 break;
Michal Simek444a70e2024-10-25 13:56:08 +0200439 default:
440 return;
441 }
442
Michal Simek806be2d2025-02-26 16:35:45 -0600443 update_info.dfu_string = strdup(buf);
444 debug("Capsule DFU: %s\n", update_info.dfu_string);
Michal Simek444a70e2024-10-25 13:56:08 +0200445}